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Commit 620340ca authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'omap-devel-prcm-for-v3.5' of...

Merge tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm

Updates for PRCM (Power, Reset, Clock Management).

Note that this depends on omap-devel-hwmod-for-v3.5.

By Kevin Hilman (3) and others
via Paul Walmsley (2) and Tony Lindgren (1)
* tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
  ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
  ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
  ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
  ARM: OMAP2+: dmtimer: cleanup iclk usage
  ARM: OMAP4+: Add prm and cm base init function.
  ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header
  ARM: OMAP3: Fix CM register bit masks
  ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx
  ARM: OMAP3: clock data: treat all AM35x devices the same
  ARM: OMAP3: clock data: replace 3503/3517 flag with AM35x flag for UART4
parents 0189a028 743a6d92
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+1 −1
Original line number Diff line number Diff line
@@ -439,7 +439,7 @@ void omap2_clk_disable_unused(struct clk *clk)
		clk->ops->disable(clk);
	}
	if (clk->clkdm != NULL)
		pwrdm_clkdm_state_switch(clk->clkdm);
		pwrdm_state_switch(clk->clkdm->pwrdm.ptr);
}
#endif

+7 −18
Original line number Diff line number Diff line
/*
 * OMAP3 clock data
 *
 * Copyright (C) 2007-2010 Texas Instruments, Inc.
 * Copyright (C) 2007-2010, 2012 Texas Instruments, Inc.
 * Copyright (C) 2007-2011 Nokia Corporation
 *
 * Written by Paul Walmsley
@@ -1640,6 +1640,7 @@ static struct clk hdq_fck = {
	.name		= "hdq_fck",
	.ops		= &clkops_omap2_dflt_wait,
	.parent		= &core_12m_fck,
	.clkdm_name	= "core_l4_clkdm",
	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
	.enable_bit	= OMAP3430_EN_HDQ_SHIFT,
	.recalc		= &followparent_recalc,
@@ -3294,8 +3295,8 @@ static struct omap_clk omap3xxx_clks[] = {
	CLK(NULL,	"gfx_l3_ick",	&gfx_l3_ick,	CK_3430ES1),
	CLK(NULL,	"gfx_cg1_ck",	&gfx_cg1_ck,	CK_3430ES1),
	CLK(NULL,	"gfx_cg2_ck",	&gfx_cg2_ck,	CK_3430ES1),
	CLK(NULL,	"sgx_fck",	&sgx_fck,	CK_3430ES2PLUS | CK_3517 | CK_36XX),
	CLK(NULL,	"sgx_ick",	&sgx_ick,	CK_3430ES2PLUS | CK_3517 | CK_36XX),
	CLK(NULL,	"sgx_fck",	&sgx_fck,	CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
	CLK(NULL,	"sgx_ick",	&sgx_ick,	CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
	CLK(NULL,	"d2d_26m_fck",	&d2d_26m_fck,	CK_3430ES1),
	CLK(NULL,	"modem_fck",	&modem_fck,	CK_34XX | CK_36XX),
	CLK(NULL,	"sad2d_ick",	&sad2d_ick,	CK_34XX | CK_36XX),
@@ -3419,7 +3420,7 @@ static struct omap_clk omap3xxx_clks[] = {
	CLK(NULL,	"per_48m_fck",	&per_48m_fck,	CK_3XXX),
	CLK(NULL,	"uart3_fck",	&uart3_fck,	CK_3XXX),
	CLK(NULL,	"uart4_fck",	&uart4_fck,	CK_36XX),
	CLK(NULL,	"uart4_fck",	&uart4_fck_am35xx, CK_3505 | CK_3517),
	CLK(NULL,	"uart4_fck",	&uart4_fck_am35xx, CK_AM35XX),
	CLK(NULL,	"gpt2_fck",	&gpt2_fck,	CK_3XXX),
	CLK(NULL,	"gpt3_fck",	&gpt3_fck,	CK_3XXX),
	CLK(NULL,	"gpt4_fck",	&gpt4_fck,	CK_3XXX),
@@ -3513,21 +3514,9 @@ int __init omap3xxx_clk_init(void)
	struct omap_clk *c;
	u32 cpu_clkflg = 0;

	/*
	 * 3505 must be tested before 3517, since 3517 returns true
	 * for both AM3517 chips and AM3517 family chips, which
	 * includes 3505.  Unfortunately there's no obvious family
	 * test for 3517/3505 :-(
	 */
	if (cpu_is_omap3505()) {
		cpu_mask = RATE_IN_34XX;
		cpu_clkflg = CK_3505;
	} else if (cpu_is_omap3517()) {
		cpu_mask = RATE_IN_34XX;
		cpu_clkflg = CK_3517;
	} else if (cpu_is_omap3505()) {
	if (cpu_is_omap3517()) {
		cpu_mask = RATE_IN_34XX;
		cpu_clkflg = CK_3505;
		cpu_clkflg = CK_AM35XX;
	} else if (cpu_is_omap3630()) {
		cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);
		cpu_clkflg = CK_36XX;
+0 −11
Original line number Diff line number Diff line
@@ -3355,17 +3355,6 @@ static struct omap_clk omap44xx_clks[] = {
	CLK(NULL,	"auxclk5_ck",			&auxclk5_ck,	CK_443X),
	CLK(NULL,	"auxclkreq5_ck",		&auxclkreq5_ck,	CK_443X),
	CLK(NULL,	"gpmc_ck",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt1_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt2_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt3_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt4_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt5_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt6_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt7_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt8_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt9_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt10_ick",			&dummy_ck,	CK_443X),
	CLK(NULL,	"gpt11_ick",			&dummy_ck,	CK_443X),
	CLK("omap_i2c.1",	"ick",				&dummy_ck,	CK_443X),
	CLK("omap_i2c.2",	"ick",				&dummy_ck,	CK_443X),
	CLK("omap_i2c.3",	"ick",				&dummy_ck,	CK_443X),
+3 −4
Original line number Diff line number Diff line
@@ -840,7 +840,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm)
	spin_lock_irqsave(&clkdm->lock, flags);
	clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED;
	arch_clkdm->clkdm_allow_idle(clkdm);
	pwrdm_clkdm_state_switch(clkdm);
	pwrdm_state_switch(clkdm->pwrdm.ptr);
	spin_unlock_irqrestore(&clkdm->lock, flags);
}

@@ -924,8 +924,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)

	spin_lock_irqsave(&clkdm->lock, flags);
	arch_clkdm->clkdm_clk_enable(clkdm);
	pwrdm_wait_transition(clkdm->pwrdm.ptr);
	pwrdm_clkdm_state_switch(clkdm);
	pwrdm_state_switch(clkdm->pwrdm.ptr);
	spin_unlock_irqrestore(&clkdm->lock, flags);

	pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name);
@@ -950,7 +949,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm)

	spin_lock_irqsave(&clkdm->lock, flags);
	arch_clkdm->clkdm_clk_disable(clkdm);
	pwrdm_clkdm_state_switch(clkdm);
	pwrdm_state_switch(clkdm->pwrdm.ptr);
	spin_unlock_irqrestore(&clkdm->lock, flags);

	pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name);
+3 −3
Original line number Diff line number Diff line
@@ -53,9 +53,9 @@
 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
 */
static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = {
	{ .clkdm_name = "iva2_clkdm", },
	{ .clkdm_name = "mpu_clkdm", },
	{ .clkdm_name = "wkup_clkdm", },
	{ .clkdm_name = "iva2_clkdm" },
	{ .clkdm_name = "mpu_clkdm" },
	{ .clkdm_name = "wkup_clkdm" },
	{ NULL },
};

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