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Unverified Commit 61cbfff4 authored by Dmitry Korotin's avatar Dmitry Korotin Committed by Paul Burton
Browse files

MIPS: pte_special()/pte_mkspecial() support 



Add support for pte_special() & pte_mkspecial(), replacing our previous
stubs with functional implementations.

Signed-off-by: default avatarDmitry Korotin <dkorotin@wavecomp.com>
[paul.burton@mips.com:
  - Fix for CONFIG_PHYS_ADDR_T_64BIT && CONFIG_CPU_MIPS32.
  - Rewrite commit message.]
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
parent a23c4134

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ config MIPS 
	select RTC_LIB

	select SYSCTL_EXCEPTION_TRACE

	select VIRT_TO_BUS

	select ARCH_HAS_PTE_SPECIAL



menu "Machine selection"

arch/mips/include/asm/pgtable-bits.h

+5 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ enum pgtable_bits { 
	_PAGE_WRITE_SHIFT,

	_PAGE_ACCESSED_SHIFT,

	_PAGE_MODIFIED_SHIFT,

	_PAGE_SPECIAL_SHIFT,

};



/*
@@ -78,6 +79,7 @@ enum pgtable_bits { 
	_PAGE_WRITE_SHIFT,

	_PAGE_ACCESSED_SHIFT,

	_PAGE_MODIFIED_SHIFT,

	_PAGE_SPECIAL_SHIFT,

};



#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
@@ -90,6 +92,7 @@ enum pgtable_bits { 
	_PAGE_WRITE_SHIFT,

	_PAGE_ACCESSED_SHIFT,

	_PAGE_MODIFIED_SHIFT,

	_PAGE_SPECIAL_SHIFT,



	/* Used by TLB hardware (placed in EntryLo) */

	_PAGE_GLOBAL_SHIFT = 8,
@@ -113,6 +116,7 @@ enum pgtable_bits { 
#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)

	_PAGE_HUGE_SHIFT,

#endif

	_PAGE_SPECIAL_SHIFT,



	/* Used by TLB hardware (placed in EntryLo*) */

#if defined(CONFIG_CPU_HAS_RIXI)
@@ -135,6 +139,7 @@ enum pgtable_bits { 
#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)

# define _PAGE_HUGE		(1 << _PAGE_HUGE_SHIFT)

#endif

#define _PAGE_SPECIAL		(1 << _PAGE_SPECIAL_SHIFT)



/* Used by TLB hardware (placed in EntryLo*) */

#if defined(CONFIG_XPA)

arch/mips/include/asm/pgtable.h

+14 −2
Original line number Diff line number Diff line
@@ -277,6 +277,7 @@ extern pgd_t swapper_pg_dir[]; 
static inline int pte_write(pte_t pte)	{ return pte.pte_low & _PAGE_WRITE; }

static inline int pte_dirty(pte_t pte)	{ return pte.pte_low & _PAGE_MODIFIED; }

static inline int pte_young(pte_t pte)	{ return pte.pte_low & _PAGE_ACCESSED; }

static inline int pte_special(pte_t pte) { return pte.pte_low & _PAGE_SPECIAL; }



static inline pte_t pte_wrprotect(pte_t pte)

{
@@ -337,10 +338,17 @@ static inline pte_t pte_mkyoung(pte_t pte) 
	}

	return pte;

}



static inline pte_t pte_mkspecial(pte_t pte)

{

	pte.pte_low |= _PAGE_SPECIAL;

	return pte;

}

#else

static inline int pte_write(pte_t pte)	{ return pte_val(pte) & _PAGE_WRITE; }

static inline int pte_dirty(pte_t pte)	{ return pte_val(pte) & _PAGE_MODIFIED; }

static inline int pte_young(pte_t pte)	{ return pte_val(pte) & _PAGE_ACCESSED; }

static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }



static inline pte_t pte_wrprotect(pte_t pte)

{
@@ -384,6 +392,12 @@ static inline pte_t pte_mkyoung(pte_t pte) 
	return pte;

}



static inline pte_t pte_mkspecial(pte_t pte)

{

	pte_val(pte) |= _PAGE_SPECIAL;

	return pte;

}



#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT

static inline int pte_huge(pte_t pte)	{ return pte_val(pte) & _PAGE_HUGE; }
@@ -394,8 +408,6 @@ static inline pte_t pte_mkhuge(pte_t pte) 
}

#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */

#endif

static inline int pte_special(pte_t pte)	{ return 0; }

static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }



/*

 * Macro to make mark a page protection value as "uncacheable".	 Note