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Commit 61669e6d authored by Fabio Estevam's avatar Fabio Estevam Committed by Greg Kroah-Hartman
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ARM: imx27: Retrieve the SYSCTRL base address from devicetree 



[ Upstream commit 94b2bec1b0e054b27b0a0b5f52a0cd55c83340f4 ]

Now that imx27 has been converted to a devicetree-only platform,
retrieve the SYSCTRL base address from devicetree.

To keep devicetree compatibilty the SYSCTRL base address will be
retrieved from the CCM base address plus an 0x800 offset.

This is not a problem as the imx27.dtsi describes the CCM register
range as 0x1000.

Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Stable-dep-of: 87b30c4b0efb ("ARM: imx: add missing of_node_put()")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent d4e913ba

arch/arm/mach-imx/cpu-imx27.c

+9 −1
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
 */



#include <linux/io.h>

#include <linux/of_address.h>

#include <linux/module.h>



#include "hardware.h"
@@ -17,16 +18,23 @@ static int mx27_cpu_rev = -1; 
static int mx27_cpu_partnumber;



#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */

#define SYSCTRL_OFFSET		0x800	/* Offset from CCM base address */



static int mx27_read_cpu_rev(void)

{

	void __iomem *ccm_base;

	struct device_node *np;

	u32 val;



	np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");

	ccm_base = of_iomap(np, 0);

	BUG_ON(!ccm_base);

	/*

	 * now we have access to the IO registers. As we need

	 * the silicon revision very early we read it here to

	 * avoid any further hooks

	*/

	val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID));

	val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);



	mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);