Loading qcom/shima-idp.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,42 @@ }; }; &sdhc_1 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&S10B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; }; &sdhc_2 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-lahaina"; Loading qcom/shima-qrd.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,42 @@ }; }; &sdhc_1 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&S10B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; }; &sdhc_2 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-lahaina"; Loading qcom/shima-rumi.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ }; &sdhc_1 { status = "ok"; status = "disabled"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; Loading qcom/shima.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -1357,6 +1357,11 @@ /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x000f642c 0x0 0x0 0x00010800 0x80040868>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; bus-width = <8>; non-removable; supports-cqe; Loading Loading
qcom/shima-idp.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,42 @@ }; }; &sdhc_1 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&S10B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; }; &sdhc_2 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-lahaina"; Loading
qcom/shima-qrd.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,42 @@ }; }; &sdhc_1 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&S10B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; }; &sdhc_2 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-lahaina"; Loading
qcom/shima-rumi.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ }; &sdhc_1 { status = "ok"; status = "disabled"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; Loading
qcom/shima.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -1357,6 +1357,11 @@ /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x000f642c 0x0 0x0 0x00010800 0x80040868>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; bus-width = <8>; non-removable; supports-cqe; Loading