Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 61053fde authored by Keith Mannthey's avatar Keith Mannthey Committed by Mauro Carvalho Chehab
Browse files

i7core_edac: Fix ecc enable shift 



From: Keith Mannthey <kmannth@us.ibm.com>

Simple correction to a shift value.
ECC_ENABLED is bit 4 of MC_STATUS, Dev 3 Fun 0 Offset 0x4c

This correctly identifies the state of the ECC at the machine.

Signed-off-by: default avatarKeith Mannthey <kmannth@us.ibm.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 3ef288a9

drivers/edac/i7core_edac.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -286,7 +286,7 @@ static struct edac_pci_ctl_info *i7core_pci; 
#define ECCx8(pvt)		((pvt)->info.mc_control & (1 << 1))

#define ECCx8(pvt)		((pvt)->info.mc_control & (1 << 1))





	/* MC_STATUS bits */

	/* MC_STATUS bits */

#define ECC_ENABLED(pvt)	((pvt)->info.mc_status & (1 << 3))

#define ECC_ENABLED(pvt)	((pvt)->info.mc_status & (1 << 4))

#define CH_DISABLED(pvt, ch)	((pvt)->info.mc_status & (1 << ch))

#define CH_DISABLED(pvt, ch)	((pvt)->info.mc_status & (1 << ch))





	/* MC_MAX_DOD read functions */

	/* MC_MAX_DOD read functions */