Commit 609f70f9 authored Aug 31, 2020 by Vishvanath Singh Committed by Avinash Philip Sep 07, 2020

ARM: dts: msm: support for qdss clock in llcc shima

Add qdss clock support for llcc inorder to support llcc perfmon module
functionality in shima.

Change-Id: Iaa2b6116477c462aebdcea645a27aafefbd15aee

parent ea572074

qcom/shima.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -2013,6 +2013,8 @@
		reg = <0x9200000 0xd0000> , <0x9600000 0x50000>;
		reg-names = "llcc_base", "llcc_broadcast_base";
		cap-based-alloc-and-pwr-collapse;
		clocks = <&aopcc QDSS_CLK>;
		clock-names = "qdss_clk";
		};

		clk_virt: interconnect {