Loading arch/arm/mach-pxa/include/mach/pxafb.h +1 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,7 @@ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) #define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 Loading arch/arm/mach-pxa/reset.c +4 −3 Original line number Diff line number Diff line Loading @@ -90,12 +90,13 @@ void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); break; case 'h': do_hw_reset(); break; case 'g': do_gpio_reset(); break; case 'h': default: do_hw_reset(); break; } } arch/arm/mach-pxa/spitz.c +2 −2 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ static unsigned long spitz_pin_config[] __initdata = { /* Chip Selects */ GPIO78_nCS_2, /* SCOOP #2 */ GPIO79_nCS_3, /* NAND */ GPIO80_nCS_4, /* SCOOP #1 */ /* LCD - 16bpp Active TFT */ Loading Loading @@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = { GPIO51_nPIOW, GPIO85_nPCE_1, GPIO54_nPCE_2, GPIO79_PSKTSEL, GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, GPIO104_PSKTSEL, /* MMC */ GPIO32_MMC_CLK, Loading Loading @@ -686,7 +687,6 @@ static void __init akita_init(void) spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; pxa_set_i2c_info(NULL); i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); common_init(); Loading arch/x86/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,8 @@ config X86_64 config X86 def_bool y select HAVE_AOUT if X86_32 select HAVE_READQ select HAVE_WRITEQ select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE Loading arch/x86/include/asm/io.h +29 −8 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ #define ARCH_HAS_IOREMAP_WC #include <linux/compiler.h> #include <asm-generic/int-ll64.h> #define build_mmio_read(name, size, type, reg, barrier) \ static inline type name(const volatile void __iomem *addr) \ Loading Loading @@ -45,19 +46,39 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define mmiowb() barrier() #ifdef CONFIG_X86_64 build_mmio_read(readq, "q", unsigned long, "=r", :"memory") build_mmio_read(__readq, "q", unsigned long, "=r", ) build_mmio_write(writeq, "q", unsigned long, "r", :"memory") build_mmio_write(__writeq, "q", unsigned long, "r", ) #define readq_relaxed(a) __readq(a) #define __raw_readq __readq #define __raw_writeq writeq #else static inline __u64 readq(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; low = readl(p); high = readl(p + 1); return low + ((u64)high << 32); } static inline void writeq(__u64 val, volatile void __iomem *addr) { writel(val, addr); writel(val >> 32, addr+4); } /* Let people know we have them */ #endif #define readq_relaxed(a) readq(a) #define __raw_readq(a) readq(a) #define __raw_writeq(val, addr) writeq(val, addr) /* Let people know that we have them */ #define readq readq #define writeq writeq #endif extern int iommu_bio_merge; Loading Loading
arch/arm/mach-pxa/include/mach/pxafb.h +1 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,7 @@ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) #define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 Loading
arch/arm/mach-pxa/reset.c +4 −3 Original line number Diff line number Diff line Loading @@ -90,12 +90,13 @@ void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); break; case 'h': do_hw_reset(); break; case 'g': do_gpio_reset(); break; case 'h': default: do_hw_reset(); break; } }
arch/arm/mach-pxa/spitz.c +2 −2 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ static unsigned long spitz_pin_config[] __initdata = { /* Chip Selects */ GPIO78_nCS_2, /* SCOOP #2 */ GPIO79_nCS_3, /* NAND */ GPIO80_nCS_4, /* SCOOP #1 */ /* LCD - 16bpp Active TFT */ Loading Loading @@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = { GPIO51_nPIOW, GPIO85_nPCE_1, GPIO54_nPCE_2, GPIO79_PSKTSEL, GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, GPIO104_PSKTSEL, /* MMC */ GPIO32_MMC_CLK, Loading Loading @@ -686,7 +687,6 @@ static void __init akita_init(void) spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; pxa_set_i2c_info(NULL); i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); common_init(); Loading
arch/x86/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,8 @@ config X86_64 config X86 def_bool y select HAVE_AOUT if X86_32 select HAVE_READQ select HAVE_WRITEQ select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE Loading
arch/x86/include/asm/io.h +29 −8 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ #define ARCH_HAS_IOREMAP_WC #include <linux/compiler.h> #include <asm-generic/int-ll64.h> #define build_mmio_read(name, size, type, reg, barrier) \ static inline type name(const volatile void __iomem *addr) \ Loading Loading @@ -45,19 +46,39 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define mmiowb() barrier() #ifdef CONFIG_X86_64 build_mmio_read(readq, "q", unsigned long, "=r", :"memory") build_mmio_read(__readq, "q", unsigned long, "=r", ) build_mmio_write(writeq, "q", unsigned long, "r", :"memory") build_mmio_write(__writeq, "q", unsigned long, "r", ) #define readq_relaxed(a) __readq(a) #define __raw_readq __readq #define __raw_writeq writeq #else static inline __u64 readq(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; low = readl(p); high = readl(p + 1); return low + ((u64)high << 32); } static inline void writeq(__u64 val, volatile void __iomem *addr) { writel(val, addr); writel(val >> 32, addr+4); } /* Let people know we have them */ #endif #define readq_relaxed(a) readq(a) #define __raw_readq(a) readq(a) #define __raw_writeq(val, addr) writeq(val, addr) /* Let people know that we have them */ #define readq readq #define writeq writeq #endif extern int iommu_bio_merge; Loading