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Commit 606c9507 authored by Iago Toral Quiroga's avatar Iago Toral Quiroga Committed by Greg Kroah-Hartman
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drm/v3d: fix wait for TMU write combiner flush



[ Upstream commit e4f868191138975f2fdf2f37c11318b47db4acc9 ]

The hardware sets the TMUWCF bit back to 0 when the TMU write
combiner flush completes so we should be checking for that instead
of the L2TFLS bit.

v2 (Melissa Wen):
  - Add Signed-off-by and Fixes tags.
  - Change the error message for the timeout to be more clear.

Fixes spurious Vulkan CTS failures in:
dEQP-VK.binding_model.descriptorset_random.*

Fixes: d223f98f ("drm/v3d: Add support for compute shader dispatch.")
Signed-off-by: default avatarIago Toral Quiroga <itoral@igalia.com>
Reviewed-by: default avatarMelissa Wen <mwen@igalia.com>
Signed-off-by: default avatarMelissa Wen <melissa.srw@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210915100507.3945-1-itoral@igalia.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 6a93d8eb
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