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Commit 60198e71 authored by Naveen Yadav's avatar Naveen Yadav
Browse files

ARM: dts: msm: Update and enable the gcc and rpmh clk node on sdxlemur

Update device tree node for gcc and rpmh controller and enable the
peripheral clock driver. Also enable the required GDSC's.

Change-Id: If365f815e807a344b54090f9a9391d5889e4a6ba
parent d9db9b35
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+17 −28
Original line number Original line Diff line number Diff line
@@ -352,22 +352,6 @@
		};
		};
	};
	};


	bi_tcxo: bi_tcxo {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <4>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};

	bi_tcxo_ao: bi_tcxo_ao {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <4>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};

	aopcc: clock-controller@0 {
	aopcc: clock-controller@0 {
		compatible = "qcom,aop-qmp-clk";
		compatible = "qcom,aop-qmp-clk";
		mboxes = <&qmp_aop 0>;
		mboxes = <&qmp_aop 0>;
@@ -375,16 +359,16 @@
		#clock-cells = <1>;
		#clock-cells = <1>;
	};
	};


	rpmhcc: clock-controller@1 {
	gcc: clock-controller@0x100000 {
		compatible = "qcom,dummycc";
		compatible = "qcom,sdxlemur-gcc", "syscon";
		clock-output-names = "rpmhcc_clocks";
		reg = <0x100000 0x1f7400>;
		#clock-cells = <1>;
		reg-name = "cc_base";
		#reset-cells = <1>;
		clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
	};
			 <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;

		clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
	gcc: clock-controller@100000 {
			      "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
		compatible = "qcom,dummycc";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		clock-output-names = "gcc_clocks";
		vdd_mx-supply = <&VDD_MX_LEVEL>;
		#clock-cells = <1>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#reset-cells = <1>;
	};
	};
@@ -431,6 +415,11 @@
		system_pm {
		system_pm {
			compatible = "qcom,system-pm";
			compatible = "qcom,system-pm";
		};
		};

		rpmhcc: clock-controller@1 {
			compatible = "qcom,sdxlemur-rpmh-clk";
			#clock-cells = <1>;
		};
	};
	};


	pdc: interrupt-controller@b210000 {
	pdc: interrupt-controller@b210000 {
@@ -444,13 +433,13 @@


	 /* GCC GDSCs */
	 /* GCC GDSCs */
	gcc_pcie_gdsc: qcom,gdsc@143004 {
	gcc_pcie_gdsc: qcom,gdsc@143004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		reg = <0x143004 0x4>;
		reg = <0x143004 0x4>;
		regulator-name = "gcc_pcie_gdsc";
		regulator-name = "gcc_pcie_gdsc";
	};
	};


	gcc_usb30_gdsc: qcom,gdsc@117004 {
	gcc_usb30_gdsc: qcom,gdsc@117004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		reg = <0x117004 0x4>;
		reg = <0x117004 0x4>;
		regulator-name = "gcc_usb30_gdsc";
		regulator-name = "gcc_usb30_gdsc";
	};
	};