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Commit 5f94950b authored by Shreyas K K's avatar Shreyas K K
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ARM: dts: msm: Add clock for SLPI pinctrl for SM8150 

Add clock node to SLPI pinctrl driver for SM8150 target.

Change-Id: I1cebf2f526e8e8a8815d13c984b5d304f57e250f
parent eedf5958

bindings/pinctrl/qcom,slpi-pinctrl.txt

+6 −0
Original line number Original line Diff line number Diff line
@@ -20,6 +20,10 @@ Following properties are for SLPI Pin controller device main node. 
	Value type: <u32>

	Value type: <u32>

	Definition: Number of PINs supported by the SLPI TLMM.

	Definition: Number of PINs supported by the SLPI TLMM.





- clock-names: Should be "ssc-clk"



- clocks: Handles to clocks specified in "clock-names" property.



Please refer to pinctrl-bindings.txt in this directory for details of the

Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".

phrase "pin configuration node".
@@ -92,6 +96,8 @@ Example: 
	slpi_tlmm: slpi_pinctrl@02b40000 {

	slpi_tlmm: slpi_pinctrl@02b40000 {

		compatible = "qcom,slpi-pinctrl";

		compatible = "qcom,slpi-pinctrl";

		qcom,num-pins = <14>;

		qcom,num-pins = <14>;

		clock-names = "ssc-clk";

		clocks =  <&clock_scc SCC_QUPV3_S_HCLK_CLK>;

		reg = <0x02b40000 0x20000>;

		reg = <0x02b40000 0x20000>;





		slpi_mclk0_active: slpi_mclk0_active {

		slpi_mclk0_active: slpi_mclk0_active {

qcom/sm8150-slpi-pinctrl.dtsi

+2 −0
Original line number Original line Diff line number Diff line
@@ -2,6 +2,8 @@ 
	slpi_tlmm: slpi_pinctrl@02B40000 {

	slpi_tlmm: slpi_pinctrl@02B40000 {

		compatible = "qcom,slpi-pinctrl";

		compatible = "qcom,slpi-pinctrl";

		reg = <0x2B40000 0x20000>;

		reg = <0x2B40000 0x20000>;

		clock-names = "ssc-clk";

		clocks =  <&scc SCC_QUPV3_S_HCLK_CLK>;

		qcom,num-pins = <14>;

		qcom,num-pins = <14>;

		status = "disabled";

		status = "disabled";