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Commit 5e2b2fbc authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: remove CRTC_3D_STRUCTURE_V_UPDATE_MODE bit programming. 



[Description]
This is based on HW programming guide update.

Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ba45df4c

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c

+2 −4
Original line number Original line Diff line number Diff line
@@ -87,9 +87,8 @@ static void optc1_disable_stereo(struct timing_generator *optc) 
	REG_SET(OTG_STEREO_CONTROL, 0,

	REG_SET(OTG_STEREO_CONTROL, 0,

		OTG_STEREO_EN, 0);

		OTG_STEREO_EN, 0);





	REG_SET_3(OTG_3D_STRUCTURE_CONTROL, 0,

	REG_SET_2(OTG_3D_STRUCTURE_CONTROL, 0,

		OTG_3D_STRUCTURE_EN, 0,

		OTG_3D_STRUCTURE_EN, 0,

		OTG_3D_STRUCTURE_V_UPDATE_MODE, 0,

		OTG_3D_STRUCTURE_STEREO_SEL_OVR, 0);

		OTG_3D_STRUCTURE_STEREO_SEL_OVR, 0);

}

}
@@ -1154,9 +1153,8 @@ static void optc1_enable_stereo(struct timing_generator *optc, 
				OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP, 1);

				OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP, 1);





		if (flags->PROGRAM_STEREO)

		if (flags->PROGRAM_STEREO)

			REG_UPDATE_3(OTG_3D_STRUCTURE_CONTROL,

			REG_UPDATE_2(OTG_3D_STRUCTURE_CONTROL,

				OTG_3D_STRUCTURE_EN, flags->FRAME_PACKED,

				OTG_3D_STRUCTURE_EN, flags->FRAME_PACKED,

				OTG_3D_STRUCTURE_V_UPDATE_MODE, flags->FRAME_PACKED,

				OTG_3D_STRUCTURE_STEREO_SEL_OVR, flags->FRAME_PACKED);

				OTG_3D_STRUCTURE_STEREO_SEL_OVR, flags->FRAME_PACKED);





	}

	}