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Commit 5dc54a65 authored by Pavel Machek's avatar Pavel Machek Committed by Jeff Garzik
Browse files

[PATCH] ipw2100: kill dead macros 



There are several never used macros in ipw2100.  This removes them.

Signed-off-by: default avatarPavel Machek <pavel@suse.cz>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
parent 4663663f

drivers/net/wireless/ipw2100.c

+0 −1
Original line number Diff line number Diff line
@@ -1116,7 +1116,6 @@ static inline int rf_kill_active(struct ipw2100_priv *priv) 
{

#define MAX_RF_KILL_CHECKS 5

#define RF_KILL_CHECK_DELAY 40

#define RF_KILL_CHECK_THRESHOLD 3



	unsigned short value = 0;

	u32 reg = 0;

drivers/net/wireless/ipw2100.h

+0 −49
Original line number Diff line number Diff line
@@ -143,15 +143,6 @@ enum { IPW_DEBUG_ENABLED = 0 }; 
#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)

#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)





#define VERIFY(f) \

{ \

  int status = 0; \

  status = f; \

  if(status) \

     return status; \

}



enum {

	IPW_HW_STATE_DISABLED = 1,

	IPW_HW_STATE_ENABLED = 0
@@ -186,8 +177,6 @@ struct bd_status { 
	} info;

} __attribute__ ((packed));



#define	IPW_BUFDESC_LAST_FRAG 0



struct ipw2100_bd {

	u32 host_addr;

	u32 buf_length;
@@ -624,9 +613,6 @@ struct ipw2100_priv { 
	struct semaphore adapter_sem;



	wait_queue_head_t wait_command_queue;

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)

	u32 pm_state[PM_STATE_SIZE];

#endif

};
@@ -728,41 +714,6 @@ struct ipw2100_priv { 
#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)





#if 0

#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c)



#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \

    (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3))

#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \

    (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3))

#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \

    (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2))



#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08)

#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c)

#define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \

    (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78)



#endif



#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)

#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)