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Commit 5d64db29 authored by Arnaldo Carvalho de Melo's avatar Arnaldo Carvalho de Melo
Browse files

tools headers: Synchronize kernel <-> tooling headers 

Two kernel headers got modified recently due to meltdown/spectre, in:

  a89f040f ("x86/cpufeatures: Add X86_BUG_CPU_INSECURE")

which are used by tooling as well:

  arch/x86/include/asm/cpufeatures.h
  arch/x86/include/asm/disabled-features.h

None of those changes have an effect on tooling, so do a plain copy.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wang Nan <wangnan0@huawei.com>
Link: https://lkml.kernel.org/n/tip-qqzcs8ri3vks8cypg0puk0ae@git.kernel.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 6439d7d1

tools/arch/x86/include/asm/cpufeatures.h

+3 −1
Original line number Diff line number Diff line
@@ -197,11 +197,12 @@ 
#define X86_FEATURE_CAT_L3		( 7*32+ 4) /* Cache Allocation Technology L3 */

#define X86_FEATURE_CAT_L2		( 7*32+ 5) /* Cache Allocation Technology L2 */

#define X86_FEATURE_CDP_L3		( 7*32+ 6) /* Code and Data Prioritization L3 */

#define X86_FEATURE_INVPCID_SINGLE	( 7*32+ 7) /* Effectively INVPCID && CR4.PCIDE=1 */



#define X86_FEATURE_HW_PSTATE		( 7*32+ 8) /* AMD HW-PState */

#define X86_FEATURE_PROC_FEEDBACK	( 7*32+ 9) /* AMD ProcFeedbackInterface */

#define X86_FEATURE_SME			( 7*32+10) /* AMD Secure Memory Encryption */



#define X86_FEATURE_PTI			( 7*32+11) /* Kernel Page Table Isolation enabled */

#define X86_FEATURE_INTEL_PPIN		( 7*32+14) /* Intel Processor Inventory Number */

#define X86_FEATURE_INTEL_PT		( 7*32+15) /* Intel Processor Trace */

#define X86_FEATURE_AVX512_4VNNIW	( 7*32+16) /* AVX-512 Neural Network Instructions */
@@ -340,5 +341,6 @@ 
#define X86_BUG_SWAPGS_FENCE		X86_BUG(11) /* SWAPGS without input dep on GS */

#define X86_BUG_MONITOR			X86_BUG(12) /* IPI required to wake up remote CPU */

#define X86_BUG_AMD_E400		X86_BUG(13) /* CPU is among the affected by Erratum 400 */

#define X86_BUG_CPU_MELTDOWN		X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */



#endif /* _ASM_X86_CPUFEATURES_H */

tools/arch/x86/include/asm/disabled-features.h

+7 −1
Original line number Diff line number Diff line
@@ -50,6 +50,12 @@ 
# define DISABLE_LA57	(1<<(X86_FEATURE_LA57 & 31))

#endif



#ifdef CONFIG_PAGE_TABLE_ISOLATION

# define DISABLE_PTI		0

#else

# define DISABLE_PTI		(1 << (X86_FEATURE_PTI & 31))

#endif



/*

 * Make sure to add features to the correct mask

 */
@@ -60,7 +66,7 @@ 
#define DISABLED_MASK4	(DISABLE_PCID)

#define DISABLED_MASK5	0

#define DISABLED_MASK6	0

#define DISABLED_MASK7	0

#define DISABLED_MASK7	(DISABLE_PTI)

#define DISABLED_MASK8	0

#define DISABLED_MASK9	(DISABLE_MPX)

#define DISABLED_MASK10	0