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Commit 5d584b2e authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: move pc8.irqs_disabled to pm.irqs_disabled 



When other platforms add runtime PM support they will also need to
disable interrupts, so move the variable to the runtime PM struct.

Also notice that the longer-term goal is to completely kill the
regsave struct, and I even have patches for that.

v2: - Rebase.
v3: - Rebase.

Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7c8615d8

drivers/gpu/drm/i915/i915_debugfs.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -2015,7 +2015,7 @@ static int i915_pc8_status(struct seq_file *m, void *unused) 
	mutex_lock(&dev_priv->pc8.lock);

	mutex_lock(&dev_priv->pc8.lock);

	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));

	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));

	seq_printf(m, "IRQs disabled: %s\n",

	seq_printf(m, "IRQs disabled: %s\n",

		   yesno(dev_priv->pc8.irqs_disabled));

		   yesno(dev_priv->pm.irqs_disabled));

	mutex_unlock(&dev_priv->pc8.lock);

	mutex_unlock(&dev_priv->pc8.lock);





	return 0;

	return 0;

drivers/gpu/drm/i915/i915_drv.h

+5 −5
Original line number Original line Diff line number Diff line
@@ -1390,8 +1390,12 @@ struct ilk_wm_values { 
 * For more, read "Display Sequences for Package C8" on our documentation.

 * For more, read "Display Sequences for Package C8" on our documentation.

 */

 */

struct i915_package_c8 {

struct i915_package_c8 {

	bool irqs_disabled;

	struct mutex lock;

	struct mutex lock;

};



struct i915_runtime_pm {

	bool suspended;

	bool irqs_disabled;





	struct {

	struct {

		uint32_t deimr;

		uint32_t deimr;
@@ -1402,10 +1406,6 @@ struct i915_package_c8 { 
	} regsave;

	} regsave;

};

};





struct i915_runtime_pm {

	bool suspended;

};



enum intel_pipe_crc_source {

enum intel_pipe_crc_source {

	INTEL_PIPE_CRC_SOURCE_NONE,

	INTEL_PIPE_CRC_SOURCE_NONE,

	INTEL_PIPE_CRC_SOURCE_PLANE1,

	INTEL_PIPE_CRC_SOURCE_PLANE1,

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1035,7 +1035,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, 
	unsigned long timeout_expire;

	unsigned long timeout_expire;

	int ret;

	int ret;





	WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n");

	WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n");





	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))

	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))

		return 0;

		return 0;

drivers/gpu/drm/i915/i915_irq.c

+29 −29
Original line number Original line Diff line number Diff line
@@ -86,9 +86,9 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) 
{

{

	assert_spin_locked(&dev_priv->irq_lock);

	assert_spin_locked(&dev_priv->irq_lock);





	if (dev_priv->pc8.irqs_disabled) {

	if (dev_priv->pm.irqs_disabled) {

		WARN(1, "IRQs disabled\n");

		WARN(1, "IRQs disabled\n");

		dev_priv->pc8.regsave.deimr &= ~mask;

		dev_priv->pm.regsave.deimr &= ~mask;

		return;

		return;

	}

	}
@@ -104,9 +104,9 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) 
{

{

	assert_spin_locked(&dev_priv->irq_lock);

	assert_spin_locked(&dev_priv->irq_lock);





	if (dev_priv->pc8.irqs_disabled) {

	if (dev_priv->pm.irqs_disabled) {

		WARN(1, "IRQs disabled\n");

		WARN(1, "IRQs disabled\n");

		dev_priv->pc8.regsave.deimr |= mask;

		dev_priv->pm.regsave.deimr |= mask;

		return;

		return;

	}

	}
@@ -129,10 +129,10 @@ static void ilk_update_gt_irq(struct drm_i915_private *dev_priv, 
{

{

	assert_spin_locked(&dev_priv->irq_lock);

	assert_spin_locked(&dev_priv->irq_lock);





	if (dev_priv->pc8.irqs_disabled) {

	if (dev_priv->pm.irqs_disabled) {

		WARN(1, "IRQs disabled\n");

		WARN(1, "IRQs disabled\n");

		dev_priv->pc8.regsave.gtimr &= ~interrupt_mask;

		dev_priv->pm.regsave.gtimr &= ~interrupt_mask;

		dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask &

		dev_priv->pm.regsave.gtimr |= (~enabled_irq_mask &

						interrupt_mask);

						interrupt_mask);

		return;

		return;

	}

	}
@@ -167,10 +167,10 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, 




	assert_spin_locked(&dev_priv->irq_lock);

	assert_spin_locked(&dev_priv->irq_lock);





	if (dev_priv->pc8.irqs_disabled) {

	if (dev_priv->pm.irqs_disabled) {

		WARN(1, "IRQs disabled\n");

		WARN(1, "IRQs disabled\n");

		dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask;

		dev_priv->pm.regsave.gen6_pmimr &= ~interrupt_mask;

		dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask &

		dev_priv->pm.regsave.gen6_pmimr |= (~enabled_irq_mask &

						     interrupt_mask);

						     interrupt_mask);

		return;

		return;

	}

	}
@@ -313,11 +313,11 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, 




	assert_spin_locked(&dev_priv->irq_lock);

	assert_spin_locked(&dev_priv->irq_lock);





	if (dev_priv->pc8.irqs_disabled &&

	if (dev_priv->pm.irqs_disabled &&

	    (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) {

	    (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) {

		WARN(1, "IRQs disabled\n");

		WARN(1, "IRQs disabled\n");

		dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask;

		dev_priv->pm.regsave.sdeimr &= ~interrupt_mask;

		dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask &

		dev_priv->pm.regsave.sdeimr |= (~enabled_irq_mask &

						 interrupt_mask);

						 interrupt_mask);

		return;

		return;

	}

	}
@@ -4118,32 +4118,32 @@ void intel_hpd_init(struct drm_device *dev) 
	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

}

}





/* Disable interrupts so we can allow Package C8+. */

/* Disable interrupts so we can allow runtime PM. */

void hsw_pc8_disable_interrupts(struct drm_device *dev)

void hsw_runtime_pm_disable_interrupts(struct drm_device *dev)

{

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	unsigned long irqflags;

	unsigned long irqflags;





	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);





	dev_priv->pc8.regsave.deimr = I915_READ(DEIMR);

	dev_priv->pm.regsave.deimr = I915_READ(DEIMR);

	dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR);

	dev_priv->pm.regsave.sdeimr = I915_READ(SDEIMR);

	dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR);

	dev_priv->pm.regsave.gtimr = I915_READ(GTIMR);

	dev_priv->pc8.regsave.gtier = I915_READ(GTIER);

	dev_priv->pm.regsave.gtier = I915_READ(GTIER);

	dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR);

	dev_priv->pm.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR);





	ironlake_disable_display_irq(dev_priv, 0xffffffff);

	ironlake_disable_display_irq(dev_priv, 0xffffffff);

	ibx_disable_display_interrupt(dev_priv, 0xffffffff);

	ibx_disable_display_interrupt(dev_priv, 0xffffffff);

	ilk_disable_gt_irq(dev_priv, 0xffffffff);

	ilk_disable_gt_irq(dev_priv, 0xffffffff);

	snb_disable_pm_irq(dev_priv, 0xffffffff);

	snb_disable_pm_irq(dev_priv, 0xffffffff);





	dev_priv->pc8.irqs_disabled = true;

	dev_priv->pm.irqs_disabled = true;





	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

}

}





/* Restore interrupts so we can recover from Package C8+. */

/* Restore interrupts so we can recover from runtime PM. */

void hsw_pc8_restore_interrupts(struct drm_device *dev)

void hsw_runtime_pm_restore_interrupts(struct drm_device *dev)

{

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	unsigned long irqflags;

	unsigned long irqflags;
@@ -4163,13 +4163,13 @@ void hsw_pc8_restore_interrupts(struct drm_device *dev) 
	val = I915_READ(GEN6_PMIMR);

	val = I915_READ(GEN6_PMIMR);

	WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val);

	WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val);





	dev_priv->pc8.irqs_disabled = false;

	dev_priv->pm.irqs_disabled = false;





	ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr);

	ironlake_enable_display_irq(dev_priv, ~dev_priv->pm.regsave.deimr);

	ibx_enable_display_interrupt(dev_priv, ~dev_priv->pc8.regsave.sdeimr);

	ibx_enable_display_interrupt(dev_priv, ~dev_priv->pm.regsave.sdeimr);

	ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr);

	ilk_enable_gt_irq(dev_priv, ~dev_priv->pm.regsave.gtimr);

	snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr);

	snb_enable_pm_irq(dev_priv, ~dev_priv->pm.regsave.gen6_pmimr);

	I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier);

	I915_WRITE(GTIER, dev_priv->pm.regsave.gtier);





	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

}
 
}

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -7040,7 +7040,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) 
	}

	}





	lpt_disable_clkout_dp(dev);

	lpt_disable_clkout_dp(dev);

	hsw_pc8_disable_interrupts(dev);

	hsw_runtime_pm_disable_interrupts(dev);

	hsw_disable_lcpll(dev_priv, true, true);

	hsw_disable_lcpll(dev_priv, true, true);

}

}
@@ -7054,7 +7054,7 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) 
	DRM_DEBUG_KMS("Disabling package C8+\n");

	DRM_DEBUG_KMS("Disabling package C8+\n");





	hsw_restore_lcpll(dev_priv);

	hsw_restore_lcpll(dev_priv);

	hsw_pc8_restore_interrupts(dev);

	hsw_runtime_pm_restore_interrupts(dev);

	lpt_init_pch_refclk(dev);

	lpt_init_pch_refclk(dev);





	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {

	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {