Loading arch/arc/boot/dts/hsdk.dts +27 −0 Original line number Diff line number Diff line Loading @@ -167,6 +167,18 @@ #clock-cells = <0>; }; dmac_core_clk: dmac-core-clk { compatible = "fixed-clock"; clock-frequency = <400000000>; #clock-cells = <0>; }; dmac_cfg_clk: dmac-gpu-cfg-clk { compatible = "fixed-clock"; clock-frequency = <200000000>; #clock-cells = <0>; }; gmac: ethernet@8000 { #interrupt-cells = <1>; compatible = "snps,dwmac"; Loading Loading @@ -239,6 +251,21 @@ reg = <0>; }; }; dmac: dmac@80000 { compatible = "snps,axi-dma-1.01a"; reg = <0x80000 0x400>; interrupts = <27>; clocks = <&dmac_core_clk>, <&dmac_cfg_clk>; clock-names = "core-clk", "cfgr-clk"; dma-channels = <4>; snps,dma-masters = <2>; snps,data-width = <3>; snps,block-size = <4096 4096 4096 4096>; snps,priority = <0 1 2 3>; snps,axi-max-burst-len = <16>; }; }; memory@80000000 { Loading Loading
arch/arc/boot/dts/hsdk.dts +27 −0 Original line number Diff line number Diff line Loading @@ -167,6 +167,18 @@ #clock-cells = <0>; }; dmac_core_clk: dmac-core-clk { compatible = "fixed-clock"; clock-frequency = <400000000>; #clock-cells = <0>; }; dmac_cfg_clk: dmac-gpu-cfg-clk { compatible = "fixed-clock"; clock-frequency = <200000000>; #clock-cells = <0>; }; gmac: ethernet@8000 { #interrupt-cells = <1>; compatible = "snps,dwmac"; Loading Loading @@ -239,6 +251,21 @@ reg = <0>; }; }; dmac: dmac@80000 { compatible = "snps,axi-dma-1.01a"; reg = <0x80000 0x400>; interrupts = <27>; clocks = <&dmac_core_clk>, <&dmac_cfg_clk>; clock-names = "core-clk", "cfgr-clk"; dma-channels = <4>; snps,dma-masters = <2>; snps,data-width = <3>; snps,block-size = <4096 4096 4096 4096>; snps,priority = <0 1 2 3>; snps,axi-max-burst-len = <16>; }; }; memory@80000000 { Loading