Commit 5ce0bad4 authored Feb 13, 2018 by Daniel Schultz Committed by Heiko Stuebner Feb 15, 2018

ARM: dts: rockchip: Remove 1.8 GHz operation point from phycore som



Rockchip recommends to run the CPU cores only with operations points of
1.6 GHz or lower.

Removed the cpu0 node with too high operation points and use the default
values instead.

Fixes: 903d31e3 ("ARM: dts: rockchip: Add support for phyCORE-RK3288 SoM")
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

parent 7928b2cb

arch/arm/boot/dts/rk3288-phycore-som.dtsi

+0 −20

Original line number	Diff line number	Diff line
		@@ -110,26 +110,6 @@
		};
		};

		&cpu0 {
		cpu0-supply = <&vdd_cpu>;
		operating-points = <
		/* KHz uV */
		1800000 1400000
		1608000 1350000
		1512000 1300000
		1416000 1200000
		1200000 1100000
		1008000 1050000
		816000 1000000
		696000 950000
		600000 900000
		408000 900000
		312000 900000
		216000 900000
		126000 900000
		>;
		};

		&emmc {
		status = "okay";
		bus-width = <8>;