Loading drivers/cpufreq/qcom-cpufreq-hw.c +33 −1 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include <linux/pm_opp.h> #include <linux/energy_model.h> #include <linux/sched.h> #include <linux/cpu_cooling.h> #define LUT_MAX_ENTRIES 40U #define CORE_COUNT_VAL(val) (((val) & (GENMASK(18, 16))) >> 16) Loading Loading @@ -70,7 +71,8 @@ static u64 qcom_cpufreq_get_cpu_cycle_counter(int cpu) spin_lock_irqsave(&cpu_counter->lock, flags); offset = CYCLE_CNTR_OFFSET(cpu, &cpu_domain->related_cpus); val = readl_relaxed(cpu_domain->reg_bases[REG_CYCLE_CNTR] + offset); val = readl_relaxed_no_log(cpu_domain->reg_bases[REG_CYCLE_CNTR] + offset); if (val < cpu_counter->prev_cycle_counter) { /* Handle counter overflow */ Loading Loading @@ -178,6 +180,35 @@ static struct freq_attr *qcom_cpufreq_hw_attr[] = { NULL }; static void qcom_cpufreq_ready(struct cpufreq_policy *policy) { static struct thermal_cooling_device *cdev[NR_CPUS]; struct device_node *np; unsigned int cpu = policy->cpu; if (cdev[cpu]) return; np = of_cpu_device_node_get(cpu); if (WARN_ON(!np)) return; /* * For now, just loading the cooling device; * thermal DT code takes care of matching them. */ if (of_find_property(np, "#cooling-cells", NULL)) { cdev[cpu] = of_cpufreq_cooling_register(policy); if (IS_ERR(cdev[cpu])) { pr_err("running cpufreq for CPU%d without cooling dev: %ld\n", cpu, PTR_ERR(cdev[cpu])); cdev[cpu] = NULL; } } of_node_put(np); } static struct cpufreq_driver cpufreq_qcom_hw_driver = { .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_HAVE_GOVERNOR_PER_POLICY, Loading @@ -189,6 +220,7 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = { .name = "qcom-cpufreq-hw", .attr = qcom_cpufreq_hw_attr, .boost_enabled = true, .ready = qcom_cpufreq_ready, }; static int qcom_cpufreq_hw_read_lut(struct platform_device *pdev, Loading Loading
drivers/cpufreq/qcom-cpufreq-hw.c +33 −1 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include <linux/pm_opp.h> #include <linux/energy_model.h> #include <linux/sched.h> #include <linux/cpu_cooling.h> #define LUT_MAX_ENTRIES 40U #define CORE_COUNT_VAL(val) (((val) & (GENMASK(18, 16))) >> 16) Loading Loading @@ -70,7 +71,8 @@ static u64 qcom_cpufreq_get_cpu_cycle_counter(int cpu) spin_lock_irqsave(&cpu_counter->lock, flags); offset = CYCLE_CNTR_OFFSET(cpu, &cpu_domain->related_cpus); val = readl_relaxed(cpu_domain->reg_bases[REG_CYCLE_CNTR] + offset); val = readl_relaxed_no_log(cpu_domain->reg_bases[REG_CYCLE_CNTR] + offset); if (val < cpu_counter->prev_cycle_counter) { /* Handle counter overflow */ Loading Loading @@ -178,6 +180,35 @@ static struct freq_attr *qcom_cpufreq_hw_attr[] = { NULL }; static void qcom_cpufreq_ready(struct cpufreq_policy *policy) { static struct thermal_cooling_device *cdev[NR_CPUS]; struct device_node *np; unsigned int cpu = policy->cpu; if (cdev[cpu]) return; np = of_cpu_device_node_get(cpu); if (WARN_ON(!np)) return; /* * For now, just loading the cooling device; * thermal DT code takes care of matching them. */ if (of_find_property(np, "#cooling-cells", NULL)) { cdev[cpu] = of_cpufreq_cooling_register(policy); if (IS_ERR(cdev[cpu])) { pr_err("running cpufreq for CPU%d without cooling dev: %ld\n", cpu, PTR_ERR(cdev[cpu])); cdev[cpu] = NULL; } } of_node_put(np); } static struct cpufreq_driver cpufreq_qcom_hw_driver = { .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_HAVE_GOVERNOR_PER_POLICY, Loading @@ -189,6 +220,7 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = { .name = "qcom-cpufreq-hw", .attr = qcom_cpufreq_hw_attr, .boost_enabled = true, .ready = qcom_cpufreq_ready, }; static int qcom_cpufreq_hw_read_lut(struct platform_device *pdev, Loading