Commit 5c7608d9 authored May 13, 2023 by Dmitry Baryshkov Committed by Greg Kroah-Hartman Sep 23, 2023

clk: qcom: gcc-mdm9615: use proper parent for pll0_vote clock



commit 1583694bb4eaf186f17131dbc1b83d6057d2749b upstream.

The pll0_vote clock definitely should have pll0 as a parent (instead of
pll8).

Fixes: 7792a8d6 ("clk: mdm9615: Add support for MDM9615 Clock Controllers")
Cc: stable@kernel.org
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230512211727.3445575-7-dmitry.baryshkov@linaro.org


Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent b88626c4

drivers/clk/qcom/gcc-mdm9615.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -58,7 +58,7 @@ static struct clk_regmap pll0_vote = {
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
		.name = "pll0_vote",
		.parent_names = (const char *[]){ "pll8" },
		.parent_names = (const char *[]){ "pll0" },
		.num_parents = 1,
		.ops = &clk_pll_vote_ops,
		},