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Commit 5c6bd5de authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS updates from Paul Burton:
 "Main MIPS changes:

   - boot_mem_map is removed, providing a nice cleanup made possible by
     the recent removal of bootmem.

   - Some fixes to atomics, in general providing compiler barriers for
     smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs
     or MIPS32 systems using cmpxchg64().

   - Conversion to the new generic VDSO infrastructure courtesy of
     Vincenzo Frascino.

   - Removal of undefined behavior in set_io_port_base(), fixing the
     behavior of some MIPS kernel configurations when built with recent
     clang versions.

   - Initial MIPS32 huge page support, functional on at least Ingenic
     SoCs.

   - pte_special() is now supported for some configurations, allowing
     among other things generic fast GUP to be used.

   - Miscellaneous fixes & cleanups.

  And platform specific changes:

   - Major improvements to Ingenic SoC support from Paul Cercueil,
     mostly enabled by the inclusion of the new TCU (timer-counter unit)
     drivers he's spent a very patient year or so working on. Plus some
     fixes for X1000 SoCs from Zhou Yanjie.

   - Netgear R6200 v1 systems are now supported by the bcm47xx platform.

   - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems"

* tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits)
  MIPS: Detect bad _PFN_SHIFT values
  MIPS: Disable pte_special() for MIPS32 with RiXi
  MIPS: ralink: deactivate PCI support for SOC_MT7621
  mips: compat: vdso: Use legacy syscalls as fallback
  MIPS: Drop Loongson _CACHE_* definitions
  MIPS: tlbex: Remove cpu_has_local_ebase
  MIPS: tlbex: Simplify r3k check
  MIPS: Select R3k-style TLB in Kconfig
  MIPS: PCI: refactor ioc3 special handling
  mips: remove ioremap_cachable
  mips/atomic: Fix smp_mb__{before,after}_atomic()
  mips/atomic: Fix loongson_llsc_mb() wreckage
  mips/atomic: Fix cmpxchg64 barriers
  MIPS: Octeon: remove duplicated include from dma-octeon.c
  firmware: bcm47xx_nvram: Allow COMPILE_TEST
  firmware: bcm47xx_nvram: Correct size_t printf format
  MIPS: Treat Loongson Extensions as ASEs
  MIPS: Remove dev_err() usage after platform_get_irq()
  MIPS: dts: mscc: describe the PTP ready interrupt
  MIPS: dts: mscc: describe the PTP register range
  ...
parents f7c3bf8f 05d013a0

Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt

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Ingenic JZ47xx PWM Controller

=============================



Required properties:

- compatible: Should be "ingenic,jz4740-pwm"

- #pwm-cells: Should be 3. See pwm.txt in this directory for a description

  of the cells format.

- clocks : phandle to the external clock.

- clock-names : Should be "ext".





Example:



	pwm: pwm@10002000 {

		compatible = "ingenic,jz4740-pwm";

		reg = <0x10002000 0x1000>;



		#pwm-cells = <3>;



		clocks = <&ext>;

		clock-names = "ext";

	};

Documentation/devicetree/bindings/timer/ingenic,tcu.txt

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Ingenic JZ47xx SoCs Timer/Counter Unit devicetree bindings

==========================================================



For a description of the TCU hardware and drivers, have a look at

Documentation/mips/ingenic-tcu.txt.



Required properties:



- compatible: Must be one of:

  * ingenic,jz4740-tcu

  * ingenic,jz4725b-tcu

  * ingenic,jz4770-tcu

  followed by "simple-mfd".

- reg: Should be the offset/length value corresponding to the TCU registers

- clocks: List of phandle & clock specifiers for clocks external to the TCU.

  The "pclk", "rtc" and "ext" clocks should be provided. The "tcu" clock

  should be provided if the SoC has it.

- clock-names: List of name strings for the external clocks.

- #clock-cells: Should be <1>;

  Clock consumers specify this argument to identify a clock. The valid values

  may be found in <dt-bindings/clock/ingenic,tcu.h>.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source. The value should be 1.

- interrupts : Specifies the interrupt the controller is connected to.



Optional properties:



- ingenic,pwm-channels-mask: Bitmask of TCU channels reserved for PWM use.

  Default value is 0xfc.





Children nodes

==========================================================





PWM node:

---------



Required properties:



- compatible: Must be one of:

  * ingenic,jz4740-pwm

  * ingenic,jz4725b-pwm

- #pwm-cells: Should be 3. See ../pwm/pwm.txt for a description of the cell

  format.

- clocks: List of phandle & clock specifiers for the TCU clocks.

- clock-names: List of name strings for the TCU clocks.





Watchdog node:

--------------



Required properties:



- compatible: Must be "ingenic,jz4740-watchdog"

- clocks: phandle to the WDT clock

- clock-names: should be "wdt"





OS Timer node:

---------



Required properties:



- compatible: Must be one of:

  * ingenic,jz4725b-ost

  * ingenic,jz4770-ost

- clocks: phandle to the OST clock

- clock-names: should be "ost"

- interrupts : Specifies the interrupt the OST is connected to.





Example

==========================================================



#include <dt-bindings/clock/jz4770-cgu.h>

#include <dt-bindings/clock/ingenic,tcu.h>



/ {

	tcu: timer@10002000 {

		compatible = "ingenic,jz4770-tcu", "simple-mfd";

		reg = <0x10002000 0x1000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0 0x10002000 0x1000>;



		#clock-cells = <1>;



		clocks = <&cgu JZ4770_CLK_RTC

			  &cgu JZ4770_CLK_EXT

			  &cgu JZ4770_CLK_PCLK>;

		clock-names = "rtc", "ext", "pclk";



		interrupt-controller;

		#interrupt-cells = <1>;



		interrupt-parent = <&intc>;

		interrupts = <27 26 25>;



		watchdog: watchdog@0 {

			compatible = "ingenic,jz4740-watchdog";

			reg = <0x0 0xc>;



			clocks = <&tcu TCU_CLK_WDT>;

			clock-names = "wdt";

		};



		pwm: pwm@40 {

			compatible = "ingenic,jz4740-pwm";

			reg = <0x40 0x80>;



			#pwm-cells = <3>;



			clocks = <&tcu TCU_CLK_TIMER0

				  &tcu TCU_CLK_TIMER1

				  &tcu TCU_CLK_TIMER2

				  &tcu TCU_CLK_TIMER3

				  &tcu TCU_CLK_TIMER4

				  &tcu TCU_CLK_TIMER5

				  &tcu TCU_CLK_TIMER6

				  &tcu TCU_CLK_TIMER7>;

			clock-names = "timer0", "timer1", "timer2", "timer3",

				      "timer4", "timer5", "timer6", "timer7";

		};



		ost: timer@e0 {

			compatible = "ingenic,jz4770-ost";

			reg = <0xe0 0x20>;



			clocks = <&tcu TCU_CLK_OST>;

			clock-names = "ost";



			interrupts = <15>;

		};

	};

};

Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt

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Ingenic Watchdog Timer (WDT) Controller for JZ4740 & JZ4780



Required properties:

compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog"

reg: Register address and length for watchdog registers

clocks: phandle to the RTC clock

clock-names: should be "rtc"



Example:



watchdog: jz4740-watchdog@10002000 {

	compatible = "ingenic,jz4740-watchdog";

	reg = <0x10002000 0x10>;



	clocks = <&cgu JZ4740_CLK_RTC>;

	clock-names = "rtc";

};

Documentation/index.rst

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@@ -144,16 +144,15 @@ implementation. 
.. toctree::

   :maxdepth: 2



   sh/index

   arm/index

   arm64/index

   ia64/index

   m68k/index

   powerpc/index

   mips/index

   nios2/nios2

   openrisc/index

   parisc/index

   powerpc/index

   riscv/index

   s390/index

   sh/index

Documentation/mips/index.rst

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.. SPDX-License-Identifier: GPL-2.0



=================

MIPS architecture

=================

===========================

MIPS-specific Documentation

===========================



.. toctree::

   :maxdepth: 2

   :numbered:



   ingenic-tcu



   au1xxx_ide