ARM: dts: msm: Add bus interconnect property for cdsp

Update cdsp node with interconnect property.

Change-Id: I122824187dd6cfe4dc490604be3ad24b64b4414c

parent 85c14955

qcom/shima.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -1510,6 +1510,8 @@
		memory-region = <&pil_cdsp_mem>;
		qcom,complete-ramdump;

		interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>;

		/* Inputs from turing */
		interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
		<&cdsp_smp2p_in 0 0>,