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Commit 5b792d32 authored by Randy Dunlap's avatar Randy Dunlap Committed by Ingo Molnar
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x86, microcode_amd: fix shift warning 



microcode_amd.c uses ">> 32" on a 32-bit value, so gcc warns about that.
The code could use something like this *untested* patch.

linux-next-20080821/arch/x86/kernel/microcode_amd.c:229: warning: right shift count >= width of type

Signed-off-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent d45de409

arch/x86/kernel/microcode_amd.c

+4 −4
Original line number Diff line number Diff line
@@ -206,6 +206,7 @@ static void apply_microcode_amd(int cpu) 
	unsigned int rev;

	int cpu_num = raw_smp_processor_id();

	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;

	unsigned long addr;



	/* We should bind the task to the CPU */

	BUG_ON(cpu_num != cpu);
@@ -215,10 +216,9 @@ static void apply_microcode_amd(int cpu) 


	spin_lock_irqsave(&microcode_update_lock, flags);



	edx = (unsigned int)(((unsigned long)

			      &(uci->mc.mc_amd->hdr.data_code)) >> 32);

	eax = (unsigned int)(((unsigned long)

			      &(uci->mc.mc_amd->hdr.data_code)) & 0xffffffffL);

	addr = (unsigned long)&uci->mc.mc_amd->hdr.data_code;

	edx = (unsigned int)(((unsigned long)upper_32_bits(addr)));

	eax = (unsigned int)(((unsigned long)lower_32_bits(addr)));



	asm volatile("movl %0, %%ecx; wrmsr" :

		     : "i" (0xc0010020), "a" (eax), "d" (edx) : "ecx");