Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5aec9f72 authored by Saurabh Sahu's avatar Saurabh Sahu Committed by Taniya Das
Browse files

bindings: clock: Add support for HOLI clock controller 

Update the GCC/DISP/GPU clock controller for HOLI device.

Change-Id: I0b8962a615c8ac810ce7434f298405d9b569757d
parent ba317d99

bindings/clock/qcom,dispcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required properties : 
			"qcom,sdm845-dispcc"

			"qcom,lahaina-dispcc"

			"qcom,shima-dispcc"

			"qcom,holi-dispcc"



- reg : shall contain base register location and length.

- #clock-cells : from common clock binding, shall contain 1.

bindings/clock/qcom,gcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ Required properties : 
			"qcom,gcc-sa8155"

			"qcom,gcc-sa8155-v2"

			"qcom,shima-gcc"



			"qcom,holi-gcc"



- reg : shall contain base register location and length

- vdd_cx-supply: The vdd_cx logic rail supply.

bindings/clock/qcom,gpucc.txt

+2 −1
Original line number Diff line number Diff line
@@ -4,7 +4,8 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding 
Required properties :

- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",

		"qcom,lahaina-gpucc",

		"qcom,shima-gpucc".

		"qcom,shima-gpucc",

		"qcom,holi-gpucc".

- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.

		Must contain "cc_base".