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Commit 5adc7d51 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/layerscape'

  - Mark Layerscape endpoint BARs 2 and 4 as 64-bit (Xiaowei Bao)

  - Add CONFIG_PCI_LAYERSCAPE_EP so EP/RC can be built separately (Xiaowei
    Bao)

* remotes/lorenzo/pci/layerscape:
  PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately
  PCI: layerscape: Add the bar_fixed_64bit property to the endpoint driver
parents 70882416 b5b24617
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+18 −2
Original line number Diff line number Diff line
@@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP
	  DesignWare core functions to implement the driver.

config PCI_LAYERSCAPE
	bool "Freescale Layerscape PCIe controller"
	bool "Freescale Layerscape PCIe controller - Host mode"
	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
	depends on PCI_MSI_IRQ_DOMAIN
	select MFD_SYSCON
	select PCIE_DW_HOST
	help
	  Say Y here if you want PCIe controller support on Layerscape SoCs.
	  Say Y here if you want to enable PCIe controller support on Layerscape
	  SoCs to work in Host mode.
	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
	  determines which PCIe controller works in EP mode and which PCIe
	  controller works in RC mode.

config PCI_LAYERSCAPE_EP
	bool "Freescale Layerscape PCIe controller - Endpoint mode"
	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
	depends on PCI_ENDPOINT
	select PCIE_DW_EP
	help
	  Say Y here if you want to enable PCIe controller support on Layerscape
	  SoCs to work in Endpoint mode.
	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
	  determines which PCIe controller works in EP mode and which PCIe
	  controller works in RC mode.

config PCI_HISI
	depends on OF && (ARM64 || COMPILE_TEST)
+2 −1
Original line number Diff line number Diff line
@@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o
obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ static const struct pci_epc_features ls_pcie_epc_features = {
	.linkup_notifier = false,
	.msi_capable = true,
	.msix_capable = false,
	.bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
};

static const struct pci_epc_features*