Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 59f20fa6 authored by Ram Chandrasekar's avatar Ram Chandrasekar
Browse files

ARM: dts: msm: Add BCL configuration for lahaina

Add BCL configuration to monitor battery current, level violation and
state of charge depletion configuration for lahaina.

Change-Id: I548cec77b1f1c64651cd1ecf7b25a4ed114830b0
parent 017c99cf
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
#include "lahaina-pmic-overlay.dtsi"
#include "lahaina-audio-overlay.dtsi"
#include "display/lahaina-sde-display-cdp.dtsi"
#include "lahaina-thermal-overlay.dtsi"

&spmi_debug_bus {
	status = "ok";
+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
#include "lahaina-pmic-overlay.dtsi"
#include "lahaina-audio-overlay.dtsi"
#include "display/lahaina-sde-display-mtp.dtsi"
#include "lahaina-thermal-overlay.dtsi"

&spmi_debug_bus {
	status = "ok";
+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@
#include "display/lahaina-sde-display-qrd.dtsi"
#include "camera/lahaina-camera-sensor-mtp.dtsi"
#include "lahaina-audio-overlay.dtsi"
#include "lahaina-thermal-overlay.dtsi"

&ufsphy_mem {
	compatible = "qcom,ufs-phy-qmp-v4-lahaina";
+131 −0
Original line number Diff line number Diff line
#include <dt-bindings/thermal/thermal_qti.h>

&mdss_mdp {
	#cooling-cells = <2>;
};

&thermal_zones {
	socd {
		cooling-maps {
			socd_cpu4 {
				trip = <&socd_trip>;
				cooling-device = <&cpu4_isolate 1 1>;
			};

			socd_cpu5 {
				trip = <&socd_trip>;
				cooling-device = <&cpu5_isolate 1 1>;
			};

			socd_cpu6 {
				trip = <&socd_trip>;
				cooling-device = <&cpu6_isolate 1 1>;
			};

			socd_cpu7 {
				trip = <&socd_trip>;
				cooling-device = <&cpu7_isolate 1 1>;
			};
		};
	};


	pm8350b-bcl-lvl0 {
		cooling-maps {
			vbat_cpu4 {
				trip = <&b_bcl_lvl0>;
				cooling-device = <&cpu4_isolate 1 1>;
			};

			vbat_cpu5 {
				trip = <&b_bcl_lvl0>;
				cooling-device = <&cpu5_isolate 1 1>;
			};

			vbat_gpu0 {
				trip = <&b_bcl_lvl0>;
				cooling-device = <&msm_gpu 2 2>;
			};
		};
	};

	pm8350b-bcl-lvl1 {
		cooling-maps {
			vbat_cpu6 {
				trip = <&b_bcl_lvl1>;
				cooling-device = <&cpu6_isolate 1 1>;
			};

			vbat_cpu7 {
				trip = <&b_bcl_lvl1>;
				cooling-device = <&cpu7_isolate 1 1>;
			};

			vbat_gpu1 {
				trip = <&b_bcl_lvl1>;
				cooling-device = <&msm_gpu 4 4>;
			};
		};
	};

	pm8350b-bcl-lvl2 {
		cooling-maps {
			vbat_gpu2 {
				trip = <&b_bcl_lvl2>;
				cooling-device = <&msm_gpu THERMAL_MAX_LIMIT
							THERMAL_MAX_LIMIT>;
			};
		};
	};

	pm8350c-bcl-lvl0 {
		disable-thermal-zone;
		cooling-maps {
			vph_cpu4 {
				trip = <&c_bcl_lvl0>;
				cooling-device = <&cpu4_isolate 1 1>;
			};

			vph_cpu5 {
				trip = <&c_bcl_lvl0>;
				cooling-device = <&cpu5_isolate 1 1>;
			};

			vph_gpu0 {
				trip = <&c_bcl_lvl0>;
				cooling-device = <&msm_gpu 2 2>;
			};
		};
	};

	pm8350c-bcl-lvl1 {
		disable-thermal-zone;
		cooling-maps {
			vph_cpu6 {
				trip = <&c_bcl_lvl1>;
				cooling-device = <&cpu6_isolate 1 1>;
			};

			vph_cpu7 {
				trip = <&c_bcl_lvl1>;
				cooling-device = <&cpu7_isolate 1 1>;
			};

			vph_gpu1 {
				trip = <&c_bcl_lvl1>;
				cooling-device = <&msm_gpu 4 4>;
			};
		};
	};

	pm8350c-bcl-lvl2 {
		disable-thermal-zone;
		cooling-maps {
			vph_gpu2 {
				trip = <&c_bcl_lvl2>;
				cooling-device = <&msm_gpu THERMAL_MAX_LIMIT
							THERMAL_MAX_LIMIT>;
			};
		};
	};
};
+107 −0
Original line number Diff line number Diff line
@@ -30,6 +30,23 @@
			#interrupt-cells = <2>;
		};

		pm8350b_bcl: bcl@4700 {
			compatible = "qcom,bcl-v5";
			reg = <0x4700 0x100>;
			interrupts = <0x3 0x47 0x0 IRQ_TYPE_NONE>,
					<0x3 0x47 0x1 IRQ_TYPE_NONE>,
					<0x3 0x47 0x2 IRQ_TYPE_NONE>;
			interrupt-names = "bcl-lvl0",
						"bcl-lvl1",
						"bcl-lvl2";
			#thermal-sensor-cells = <1>;
		};

		bcl_soc:bcl-soc {
			compatible = "qcom,msm-bcl-soc";
			#thermal-sensor-cells = <0>;
		};

		pm8350b_haptics: qcom,hv-haptics@f000 {
			compatible = "qcom,hv-haptics";
			reg = <0xf000>, <0xf100>;
@@ -176,4 +193,94 @@
			};
		};
	};

	pm8350b-ibat-lvl0 {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&pm8350b_bcl 0>;

		trips {
			ibat_lvl0:ibat-lvl0 {
				temperature = <4500>;
				hysteresis = <200>;
				type = "passive";
			};
		};
	};

	pm8350b-ibat-lvl1 {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&pm8350b_bcl 1>;

		trips {
			ibat_lvl1:ibat-lvl1 {
				temperature = <5000>;
				hysteresis = <200>;
				type = "passive";
			};
		};
	};

	pm8350b-bcl-lvl0 {
		polling-delay-passive = <100>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&pm8350b_bcl 5>;

		trips {
			b_bcl_lvl0: b-bcl-lvl0 {
				temperature = <1>;
				hysteresis = <1>;
				type = "passive";
			};
		};
	};

	pm8350b-bcl-lvl1 {
		polling-delay-passive = <100>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&pm8350b_bcl 6>;

		trips {
			b_bcl_lvl1: b-bcl-lvl1 {
				temperature = <1>;
				hysteresis = <1>;
				type = "passive";
			};
		};
	};

	pm8350b-bcl-lvl2 {
		polling-delay-passive = <100>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&pm8350b_bcl 7>;

		trips {
			b_bcl_lvl2: b-bcl-lvl2 {
				temperature = <1>;
				hysteresis = <1>;
				type = "passive";
			};
		};
	};

	socd {
		polling-delay-passive = <100>;
		polling-delay = <0>;
		thermal-governor = "step_wise";
		thermal-sensors = <&bcl_soc>;

		trips {
			socd_trip:socd-trip {
				temperature = <90>;
				hysteresis = <0>;
				type = "passive";
			};
		};
	};
};
Loading