Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 59bdaed5 authored by Mark Brown's avatar Mark Brown Committed by Greg Kroah-Hartman
Browse files

ARM: dts: at91: Map MCLK for wm8731 on at91sam9g20ek 



[ Upstream commit 0e486fe341fabd8e583f3d601a874cd394979c45 ]

The MCLK of the WM8731 on the AT91SAM9G20-EK board is connected to the
PCK0 output of the SoC and is expected to be set to 12MHz. Previously
this was mapped using pre-common clock API calls in the audio machine
driver but the conversion to the common clock framework broke that so
describe things in the DT instead.

Fixes: ff78a189 ("ARM: at91: remove old at91-specific clock driver")
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220404102806.581374-2-broonie@kernel.org


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent dbce8fc1

arch/arm/boot/dts/at91sam9g20ek_common.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -217,6 +217,12 @@ 
		wm8731: wm8731@1b {

			compatible = "wm8731";

			reg = <0x1b>;



			/* PCK0 at 12MHz */

			clocks = <&pmc PMC_TYPE_SYSTEM 8>;

			clock-names = "mclk";

			assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;

			assigned-clock-rates = <12000000>;

		};

	};