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Commit 5980bcaa authored by Kent Russell's avatar Kent Russell Committed by Alex Deucher
Browse files

drm/amdgpu: Fix CIK references in gmc_v8 



gmc_v8 is for VI, not CIK, so fix those references

Signed-off-by: default avatarKent Russell <kent.russell@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dcea6e65

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+7 −7
Original line number Diff line number Diff line
@@ -289,7 +289,7 @@ static int gmc_v8_0_init_microcode(struct amdgpu_device *adev) 
 *

 * @adev: amdgpu_device pointer

 *

 * Load the GDDR MC ucode into the hw (CIK).

 * Load the GDDR MC ucode into the hw (VI).

 * Returns 0 on success, error on failure.

 */

static int gmc_v8_0_tonga_mc_load_microcode(struct amdgpu_device *adev)
@@ -443,7 +443,7 @@ static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev, 
 * @adev: amdgpu_device pointer

 *

 * Set the location of vram, gart, and AGP in the GPU's

 * physical address space (CIK).

 * physical address space (VI).

 */

static void gmc_v8_0_mc_program(struct amdgpu_device *adev)

{
@@ -515,7 +515,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) 
 * @adev: amdgpu_device pointer

 *

 * Look up the amount of vram, vram width, and decide how to place

 * vram and gart within the GPU's physical address space (CIK).

 * vram and gart within the GPU's physical address space (VI).

 * Returns 0 for success.

 */

static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
@@ -630,7 +630,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev) 
 * @adev: amdgpu_device pointer

 * @vmid: vm instance to flush

 *

 * Flush the TLB for the requested page table (CIK).

 * Flush the TLB for the requested page table (VI).

 */

static void gmc_v8_0_flush_gpu_tlb(struct amdgpu_device *adev,

				uint32_t vmid, uint32_t flush_type)
@@ -800,7 +800,7 @@ static void gmc_v8_0_set_prt(struct amdgpu_device *adev, bool enable) 
 * This sets up the TLBs, programs the page tables for VMID0,

 * sets up the hw for VMIDs 1-15 which are allocated on

 * demand, and sets up the global locations for the LDS, GDS,

 * and GPUVM for FSA64 clients (CIK).

 * and GPUVM for FSA64 clients (VI).

 * Returns 0 for success, errors for failure.

 */

static int gmc_v8_0_gart_enable(struct amdgpu_device *adev)
@@ -948,7 +948,7 @@ static int gmc_v8_0_gart_init(struct amdgpu_device *adev) 
 *

 * @adev: amdgpu_device pointer

 *

 * This disables all VM page table (CIK).

 * This disables all VM page table (VI).

 */

static void gmc_v8_0_gart_disable(struct amdgpu_device *adev)

{
@@ -978,7 +978,7 @@ static void gmc_v8_0_gart_disable(struct amdgpu_device *adev) 
 * @status: VM_CONTEXT1_PROTECTION_FAULT_STATUS register value

 * @addr: VM_CONTEXT1_PROTECTION_FAULT_ADDR register value

 *

 * Print human readable fault information (CIK).

 * Print human readable fault information (VI).

 */

static void gmc_v8_0_vm_decode_fault(struct amdgpu_device *adev, u32 status,

				     u32 addr, u32 mc_client, unsigned pasid)