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Commit 58dc0605 authored by Hemant Kumar's avatar Hemant Kumar
Browse files

ARM: dts: msm: Enable L1SS sleep for Lahaina-v2.1 

PCIe0 phy on v2.1 manages the phy PLL properly hence
remove the software workaround to keep the phy PLL
always on.

Change-Id: Ia32cebb53b6873b2c9f3b07299eb3208c5b5a77c
parent 0890db45

qcom/lahaina-v2.1.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
};



&pcie0 {

	qcom,l1ss-sleep-disable = <0x0>;

	qcom,pcie-phy-ver = <21100>;

	qcom,phy-sequence = <0x0240 0x03 0x0

			0x0094 0x08 0x0