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Commit 58b87d21 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'stmmac-fixes' 



Jose Abreu says:

====================
net: stmmac: Fixes for -net

Misc fixes for stmmac.

Patch 1/11 and 2/11, use the correct variable type for bitrev32() calls.

Patch 3/11, fixes the random failures the we were seing when running selftests.

Patch 4/11, prevents a crash that can occur when receiving AVB packets and with
SPH feature enabled on XGMAC.

Patch 5/11, fixes the correct settings for CBS on XGMAC.

Patch 6/11, corrects the interpretation of AVB feature on XGMAC.

Patch 7/11, disables Flow Control for AVB enabled queues on XGMAC.

Patch 8/11, disables MMC interrupts on XGMAC, preventing a storm of interrupts.

Patch 9/11, fixes the number of packets that were being taken into account in
the RX path cleaning function.

Patch 10/11, fixes an incorrect descriptor setting that could cause IP
misbehavior.

Patch 11/11, fixes the IOC generation mechanism when multiple descriptors
are used.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 53ba60af 7df4a3a7

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

+1 −1
Original line number Diff line number Diff line
@@ -432,7 +432,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw, 
			 * bits used depends on the hardware configuration

			 * selected at core configuration time.

			 */

			int bit_nr = bitrev32(~crc32_le(~0, ha->addr,

			u32 bit_nr = bitrev32(~crc32_le(~0, ha->addr,

					ETH_ALEN)) >> (32 - mcbitslog2);

			/* The most significant bit determines the register to

			 * use (H/L) while the other 5 bits determine the bit

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

+2 −1
Original line number Diff line number Diff line
@@ -224,6 +224,7 @@ static void dwxgmac2_config_cbs(struct mac_device_info *hw, 
	writel(low_credit, ioaddr + XGMAC_MTL_TCx_LOCREDIT(queue));



	value = readl(ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue));

	value &= ~XGMAC_TSA;

	value |= XGMAC_CC | XGMAC_CBS;

	writel(value, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue));

}
@@ -463,7 +464,7 @@ static void dwxgmac2_set_filter(struct mac_device_info *hw, 
		value |= XGMAC_FILTER_HMC;



		netdev_for_each_mc_addr(ha, dev) {

			int nr = (bitrev32(~crc32_le(~0, ha->addr, 6)) >>

			u32 nr = (bitrev32(~crc32_le(~0, ha->addr, 6)) >>

					(32 - mcbitslog2));

			mc_filter[nr >> 5] |= (1 << (nr & 0x1F));

		}

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

+2 −1
Original line number Diff line number Diff line
@@ -288,6 +288,7 @@ static int dwxgmac2_get_rx_hash(struct dma_desc *p, u32 *hash, 


static int dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int *len)

{

	if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T)

		*len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL;

	return 0;

}

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c

+3 −1
Original line number Diff line number Diff line
@@ -369,7 +369,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, 
	dma_cap->eee = (hw_cap & XGMAC_HWFEAT_EEESEL) >> 13;

	dma_cap->atime_stamp = (hw_cap & XGMAC_HWFEAT_TSSEL) >> 12;

	dma_cap->av = (hw_cap & XGMAC_HWFEAT_AVSEL) >> 11;

	dma_cap->av &= !(hw_cap & XGMAC_HWFEAT_RAVSEL) >> 10;

	dma_cap->av &= !((hw_cap & XGMAC_HWFEAT_RAVSEL) >> 10);

	dma_cap->arpoffsel = (hw_cap & XGMAC_HWFEAT_ARPOFFSEL) >> 9;

	dma_cap->rmon = (hw_cap & XGMAC_HWFEAT_MMCSEL) >> 8;

	dma_cap->pmt_magic_frame = (hw_cap & XGMAC_HWFEAT_MGKSEL) >> 7;
@@ -470,6 +470,7 @@ static void dwxgmac2_enable_tso(void __iomem *ioaddr, bool en, u32 chan) 
static void dwxgmac2_qmode(void __iomem *ioaddr, u32 channel, u8 qmode)

{

	u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel));

	u32 flow = readl(ioaddr + XGMAC_RX_FLOW_CTRL);



	value &= ~XGMAC_TXQEN;

	if (qmode != MTL_QUEUE_AVB) {
@@ -477,6 +478,7 @@ static void dwxgmac2_qmode(void __iomem *ioaddr, u32 channel, u8 qmode) 
		writel(0, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(channel));

	} else {

		value |= 0x1 << XGMAC_TXQEN_SHIFT;

		writel(flow & (~XGMAC_RFE), ioaddr + XGMAC_RX_FLOW_CTRL);

	}



	writel(value, ioaddr +  XGMAC_MTL_TXQ_OPMODE(channel));

drivers/net/ethernet/stmicro/stmmac/mmc_core.c

+4 −2
Original line number Diff line number Diff line
@@ -176,6 +176,7 @@ 
#define MMC_XGMAC_RX_PKT_SMD_ERR	0x22c

#define MMC_XGMAC_RX_PKT_ASSEMBLY_OK	0x230

#define MMC_XGMAC_RX_FPE_FRAG		0x234

#define MMC_XGMAC_RX_IPC_INTR_MASK	0x25c



static void dwmac_mmc_ctrl(void __iomem *mmcaddr, unsigned int mode)

{
@@ -333,8 +334,9 @@ static void dwxgmac_mmc_ctrl(void __iomem *mmcaddr, unsigned int mode) 


static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr)

{

	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_RX_INTR_MASK);

	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_TX_INTR_MASK);

	writel(0x0, mmcaddr + MMC_RX_INTR_MASK);

	writel(0x0, mmcaddr + MMC_TX_INTR_MASK);

	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK);

}



static void dwxgmac_read_mmc_reg(void __iomem *addr, u32 reg, u32 *dest)