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Commit 58871649 authored by Jim Mattson's avatar Jim Mattson Committed by Paolo Bonzini
Browse files

kvm: vmx: Introduce lapic_mode enumeration 



The local APIC can be in one of three modes: disabled, xAPIC or
x2APIC. (A fourth mode, "invalid," is included for completeness.)

Using the new enumeration can make some of the APIC mode logic easier
to read. In kvm_set_apic_base, for instance, it is clear that one
cannot transition directly from x2APIC mode to xAPIC mode or directly
from APIC disabled to x2APIC mode.

Signed-off-by: default avatarJim Mattson <jmattson@google.com>
Signed-off-by: default avatarKrish Sadhukhan <krish.sadhukhan@oracle.com>
[Check invalid bits even if msr_info->host_initiated.  Reported by
 Wanpeng Li. - Paolo]
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent ceef7d10

arch/x86/kvm/lapic.h

+14 −0
Original line number Original line Diff line number Diff line
@@ -16,6 +16,13 @@ 
#define APIC_BUS_CYCLE_NS       1

#define APIC_BUS_CYCLE_NS       1

#define APIC_BUS_FREQUENCY      (1000000000ULL / APIC_BUS_CYCLE_NS)

#define APIC_BUS_FREQUENCY      (1000000000ULL / APIC_BUS_CYCLE_NS)





enum lapic_mode {

	LAPIC_MODE_DISABLED = 0,

	LAPIC_MODE_INVALID = X2APIC_ENABLE,

	LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,

	LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,

};



struct kvm_timer {

struct kvm_timer {

	struct hrtimer timer;

	struct hrtimer timer;

	s64 period; 				/* unit: ns */

	s64 period; 				/* unit: ns */
@@ -89,6 +96,7 @@ u64 kvm_get_apic_base(struct kvm_vcpu *vcpu); 
int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);

int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);

int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu);

int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);

int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);





u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);

u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
@@ -220,4 +228,10 @@ void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu); 
void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);

void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);

bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);

bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);

void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);

void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);



static inline enum lapic_mode kvm_apic_mode(u64 apic_base)

{

	return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);

}



#endif
 
#endif

arch/x86/kvm/x86.c

+15 −11
Original line number Original line Diff line number Diff line
@@ -318,23 +318,27 @@ u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) 
}

}

EXPORT_SYMBOL_GPL(kvm_get_apic_base);

EXPORT_SYMBOL_GPL(kvm_get_apic_base);





enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)

{

	return kvm_apic_mode(kvm_get_apic_base(vcpu));

}

EXPORT_SYMBOL_GPL(kvm_get_apic_mode);



int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)

int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)

{

{

	u64 old_state = vcpu->arch.apic_base &

	enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);

		(MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);

	enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);

	u64 new_state = msr_info->data &

		(MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);

	u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |

	u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |

		(guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);

		(guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);





	if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)

	if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)

		return 1;

		return 1;

	if (!msr_info->host_initiated &&

	if (!msr_info->host_initiated) {

	    ((new_state == MSR_IA32_APICBASE_ENABLE &&

		if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)

	      old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||

			return 1;

	     (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&

		if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)

	      old_state == 0)))

			return 1;

			return 1;

	}





	kvm_lapic_set_base(vcpu, msr_info->data);

	kvm_lapic_set_base(vcpu, msr_info->data);

	return 0;

	return 0;