Loading MAINTAINERS +2 −1 Original line number Diff line number Diff line Loading @@ -5658,7 +5658,8 @@ F: arch/arm/mach-s3c2410/bast-ide.c F: arch/arm/mach-s3c2410/bast-irq.c TI DAVINCI MACHINE SUPPORT M: Kevin Hilman <khilman@deeprootsystems.com> M: Sekhar Nori <nsekhar@ti.com> M: Kevin Hilman <khilman@ti.com> L: davinci-linux-open-source@linux.davincidsp.com (subscribers-only) Q: http://patchwork.kernel.org/project/linux-davinci/list/ S: Supported Loading arch/arm/mach-davinci/board-da830-evm.c +67 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,8 @@ #include <linux/i2c/at24.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -30,6 +32,7 @@ #include <mach/da8xx.h> #include <mach/usb.h> #include <mach/aemif.h> #include <mach/spi.h> #define DA830_EVM_PHY_ID "" /* Loading Loading @@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = { }, }; static struct mtd_partition da830evm_spiflash_part[] = { [0] = { .name = "DSP-UBL", .offset = 0, .size = SZ_8K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "ARM-UBL", .offset = MTDPART_OFS_APPEND, .size = SZ_16K + SZ_8K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "U-Boot", .offset = MTDPART_OFS_APPEND, .size = SZ_256K - SZ_32K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "U-Boot-Environment", .offset = MTDPART_OFS_APPEND, .size = SZ_16K, .mask_flags = 0, }, [4] = { .name = "Kernel", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, }; static struct flash_platform_data da830evm_spiflash_data = { .name = "m25p80", .parts = da830evm_spiflash_part, .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), .type = "w25x32", }; static struct davinci_spi_config da830evm_spiflash_cfg = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info da830evm_spi_info[] = { { .modalias = "m25p80", .platform_data = &da830evm_spiflash_data, .controller_data = &da830evm_spiflash_cfg, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 0, .chip_select = 0, }, }; static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; Loading Loading @@ -590,6 +651,12 @@ static __init void da830_evm_init(void) ret = da8xx_register_rtc(); if (ret) pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); ret = da8xx_register_spi(0, da830evm_spi_info, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warning("da830_evm_init: spi 0 registration failed: %d\n", ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE Loading arch/arm/mach-davinci/board-da850-evm.c +90 −6 Original line number Diff line number Diff line Loading @@ -29,6 +29,8 @@ #include <linux/regulator/machine.h> #include <linux/regulator/tps6507x.h> #include <linux/input/tps6507x-ts.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -38,6 +40,7 @@ #include <mach/nand.h> #include <mach/mux.h> #include <mach/aemif.h> #include <mach/spi.h> #define DA850_EVM_PHY_ID "0:00" #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) Loading @@ -48,6 +51,70 @@ #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) static struct mtd_partition da850evm_spiflash_part[] = { [0] = { .name = "UBL", .offset = 0, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "U-Boot", .offset = MTDPART_OFS_APPEND, .size = SZ_512K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "U-Boot-Env", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "Kernel", .offset = MTDPART_OFS_APPEND, .size = SZ_2M + SZ_512K, .mask_flags = 0, }, [4] = { .name = "Filesystem", .offset = MTDPART_OFS_APPEND, .size = SZ_4M, .mask_flags = 0, }, [5] = { .name = "MAC-Address", .offset = SZ_8M - SZ_64K, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, }; static struct flash_platform_data da850evm_spiflash_data = { .name = "m25p80", .parts = da850evm_spiflash_part, .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), .type = "m25p64", }; static struct davinci_spi_config da850evm_spiflash_cfg = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info da850evm_spi_info[] = { { .modalias = "m25p80", .platform_data = &da850evm_spiflash_data, .controller_data = &da850evm_spiflash_cfg, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 1, .chip_select = 0, }, }; static struct mtd_partition da850_evm_norflash_partition[] = { { .name = "bootloaders + env", Loading Loading @@ -231,8 +298,6 @@ static const short da850_evm_nor_pins[] = { -1 }; static u32 ui_card_detected; #if defined(CONFIG_MMC_DAVINCI) || \ defined(CONFIG_MMC_DAVINCI_MODULE) #define HAS_MMC 1 Loading @@ -244,7 +309,7 @@ static inline void da850_evm_setup_nor_nand(void) { int ret = 0; if (ui_card_detected & !HAS_MMC) { if (!HAS_MMC) { ret = davinci_cfg_reg_list(da850_evm_nand_pins); if (ret) pr_warning("da850_evm_init: nand mux setup failed: " Loading Loading @@ -394,7 +459,6 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, goto exp_setup_keys_fail; } ui_card_detected = 1; pr_info("DA850/OMAP-L138 EVM UI card detected\n"); da850_evm_setup_nor_nand(); Loading Loading @@ -664,6 +728,13 @@ static struct snd_platform_data da850_evm_snd_data = { .rxnumevt = 1, }; static const short da850_evm_mcasp_pins[] __initconst = { DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, DA850_AXR_11, DA850_AXR_12, -1 }; static int da850_evm_mmc_get_ro(int index) { return gpio_get_value(DA850_MMCSD_WP_PIN); Loading @@ -683,6 +754,13 @@ static struct davinci_mmc_config da850_mmc_config = { .version = MMC_CTLR_VERSION_2, }; static const short da850_evm_mmcsd0_pins[] __initconst = { DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, DA850_GPIO4_0, DA850_GPIO4_1, -1 }; static void da850_panel_power_ctrl(int val) { /* lcd backlight */ Loading Loading @@ -1070,7 +1148,7 @@ static __init void da850_evm_init(void) ret); if (HAS_MMC) { ret = davinci_cfg_reg_list(da850_mmcsd0_pins); ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); if (ret) pr_warning("da850_evm_init: mmcsd0 mux setup failed:" " %d\n", ret); Loading Loading @@ -1106,7 +1184,7 @@ static __init void da850_evm_init(void) __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); ret = davinci_cfg_reg_list(da850_mcasp_pins); ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); if (ret) pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", ret); Loading Loading @@ -1153,6 +1231,12 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: suspend registration failed: %d\n", ret); ret = da8xx_register_spi(1, da850evm_spi_info, ARRAY_SIZE(da850evm_spi_info)); if (ret) pr_warning("da850_evm_init: spi 1 registration failed: %d\n", ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE Loading arch/arm/mach-davinci/board-mityomapl138.c +159 −8 Original line number Diff line number Diff line Loading @@ -17,6 +17,8 @@ #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/etherdevice.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -25,6 +27,7 @@ #include <mach/da8xx.h> #include <mach/nand.h> #include <mach/mux.h> #include <mach/spi.h> #define MITYOMAPL138_PHY_ID "0:03" Loading @@ -44,38 +47,109 @@ struct factory_config { static struct factory_config factory_config; struct part_no_info { const char *part_no; /* part number string of interest */ int max_freq; /* khz */ }; static struct part_no_info mityomapl138_pn_info[] = { { .part_no = "L138-C", .max_freq = 300000, }, { .part_no = "L138-D", .max_freq = 375000, }, { .part_no = "L138-F", .max_freq = 456000, }, { .part_no = "1808-C", .max_freq = 300000, }, { .part_no = "1808-D", .max_freq = 375000, }, { .part_no = "1808-F", .max_freq = 456000, }, { .part_no = "1810-D", .max_freq = 375000, }, }; #ifdef CONFIG_CPU_FREQ static void mityomapl138_cpufreq_init(const char *partnum) { int i, ret; for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) { /* * the part number has additional characters beyond what is * stored in the table. This information is not needed for * determining the speed grade, and would require several * more table entries. Only check the first N characters * for a match. */ if (!strncmp(partnum, mityomapl138_pn_info[i].part_no, strlen(mityomapl138_pn_info[i].part_no))) { da850_max_speed = mityomapl138_pn_info[i].max_freq; break; } } ret = da850_register_cpufreq("pll0_sysclk3"); if (ret) pr_warning("cpufreq registration failed: %d\n", ret); } #else static void mityomapl138_cpufreq_init(const char *partnum) { } #endif static void read_factory_config(struct memory_accessor *a, void *context) { int ret; const char *partnum = NULL; struct davinci_soc_info *soc_info = &davinci_soc_info; ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config)); if (ret != sizeof(struct factory_config)) { pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n", ret); return; goto bad_config; } if (factory_config.magic != FACTORY_CONFIG_MAGIC) { pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n", factory_config.magic); return; goto bad_config; } if (factory_config.version != FACTORY_CONFIG_VERSION) { pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n", factory_config.version); return; goto bad_config; } pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac); pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum); if (is_valid_ether_addr(factory_config.mac)) memcpy(soc_info->emac_pdata->mac_addr, factory_config.mac, ETH_ALEN); else pr_warning("MityOMAPL138: Invalid MAC found " "in factory config block\n"); partnum = factory_config.partnum; pr_info("MityOMAPL138: Part Number = %s\n", partnum); bad_config: /* default maximum speed is valid for all platforms */ mityomapl138_cpufreq_init(partnum); } static struct at24_platform_data mityomapl138_fd_chip = { Loading Loading @@ -222,6 +296,82 @@ static int __init pmic_tps65023_init(void) ARRAY_SIZE(mityomap_tps65023_info)); } /* * SPI Devices: * SPI1_CS0: 8M Flash ST-M25P64-VME6G */ static struct mtd_partition spi_flash_partitions[] = { [0] = { .name = "ubl", .offset = 0, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "u-boot", .offset = MTDPART_OFS_APPEND, .size = SZ_512K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "u-boot-env", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "periph-config", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [4] = { .name = "reserved", .offset = MTDPART_OFS_APPEND, .size = SZ_256K + SZ_64K, }, [5] = { .name = "kernel", .offset = MTDPART_OFS_APPEND, .size = SZ_2M + SZ_1M, }, [6] = { .name = "fpga", .offset = MTDPART_OFS_APPEND, .size = SZ_2M, }, [7] = { .name = "spare", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, }, }; static struct flash_platform_data mityomapl138_spi_flash_data = { .name = "m25p80", .parts = spi_flash_partitions, .nr_parts = ARRAY_SIZE(spi_flash_partitions), .type = "m24p64", }; static struct davinci_spi_config spi_eprom_config = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info mityomapl138_spi_flash_info[] = { { .modalias = "m25p80", .platform_data = &mityomapl138_spi_flash_data, .controller_data = &spi_eprom_config, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 1, .chip_select = 0, }, }; /* * MityDSP-L138 includes a 256 MByte large-page NAND flash * (128K blocks). Loading Loading @@ -377,16 +527,17 @@ static void __init mityomapl138_init(void) mityomapl138_setup_nand(); ret = da8xx_register_spi(1, mityomapl138_spi_flash_info, ARRAY_SIZE(mityomapl138_spi_flash_info)); if (ret) pr_warning("spi 1 registration failed: %d\n", ret); mityomapl138_config_emac(); ret = da8xx_register_rtc(); if (ret) pr_warning("rtc setup failed: %d\n", ret); ret = da850_register_cpufreq("pll0_sysclk3"); if (ret) pr_warning("cpufreq registration failed: %d\n", ret); ret = da8xx_register_cpuidle(); if (ret) pr_warning("cpuidle registration failed: %d\n", ret); Loading arch/arm/mach-davinci/board-omapl138-hawk.c +284 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,279 @@ #include <mach/cp_intc.h> #include <mach/da8xx.h> #include <mach/mux.h> #define HAWKBOARD_PHY_ID "0:07" #define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) #define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) #define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4) #define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13) static short omapl138_hawk_mii_pins[] __initdata = { DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, DA850_MDIO_D, -1 }; static __init void omapl138_hawk_config_emac(void) { void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); int ret; u32 val; struct davinci_soc_info *soc_info = &davinci_soc_info; val = __raw_readl(cfgchip3); val &= ~BIT(8); ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins); if (ret) { pr_warning("%s: cpgmac/mii mux setup failed: %d\n", __func__, ret); return; } /* configure the CFGCHIP3 register for MII */ __raw_writel(val, cfgchip3); pr_info("EMAC: MII PHY configured\n"); soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; ret = da8xx_register_emac(); if (ret) pr_warning("%s: emac registration failed: %d\n", __func__, ret); } /* * The following EDMA channels/slots are not being used by drivers (for * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard, * hence they are being reserved for codecs on the DSP side. */ static const s16 da850_dma0_rsv_chans[][2] = { /* (offset, number) */ { 8, 6}, {24, 4}, {30, 2}, {-1, -1} }; static const s16 da850_dma0_rsv_slots[][2] = { /* (offset, number) */ { 8, 6}, {24, 4}, {30, 50}, {-1, -1} }; static const s16 da850_dma1_rsv_chans[][2] = { /* (offset, number) */ { 0, 28}, {30, 2}, {-1, -1} }; static const s16 da850_dma1_rsv_slots[][2] = { /* (offset, number) */ { 0, 28}, {30, 90}, {-1, -1} }; static struct edma_rsv_info da850_edma_cc0_rsv = { .rsv_chans = da850_dma0_rsv_chans, .rsv_slots = da850_dma0_rsv_slots, }; static struct edma_rsv_info da850_edma_cc1_rsv = { .rsv_chans = da850_dma1_rsv_chans, .rsv_slots = da850_dma1_rsv_slots, }; static struct edma_rsv_info *da850_edma_rsv[2] = { &da850_edma_cc0_rsv, &da850_edma_cc1_rsv, }; static const short hawk_mmcsd0_pins[] = { DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, DA850_GPIO3_12, DA850_GPIO3_13, -1 }; static int da850_hawk_mmc_get_ro(int index) { return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN); } static int da850_hawk_mmc_get_cd(int index) { return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN); } static struct davinci_mmc_config da850_mmc_config = { .get_ro = da850_hawk_mmc_get_ro, .get_cd = da850_hawk_mmc_get_cd, .wires = 4, .max_freq = 50000000, .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, .version = MMC_CTLR_VERSION_2, }; static __init void omapl138_hawk_mmc_init(void) { int ret; ret = davinci_cfg_reg_list(hawk_mmcsd0_pins); if (ret) { pr_warning("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret); return; } ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN, GPIOF_DIR_IN, "MMC CD"); if (ret < 0) { pr_warning("%s: can not open GPIO %d\n", __func__, DA850_HAWK_MMCSD_CD_PIN); return; } ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN, GPIOF_DIR_IN, "MMC WP"); if (ret < 0) { pr_warning("%s: can not open GPIO %d\n", __func__, DA850_HAWK_MMCSD_WP_PIN); goto mmc_setup_wp_fail; } ret = da8xx_register_mmcsd0(&da850_mmc_config); if (ret) { pr_warning("%s: MMC/SD0 registration failed: %d\n", __func__, ret); goto mmc_setup_mmcsd_fail; } return; mmc_setup_mmcsd_fail: gpio_free(DA850_HAWK_MMCSD_WP_PIN); mmc_setup_wp_fail: gpio_free(DA850_HAWK_MMCSD_CD_PIN); } static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id); static da8xx_ocic_handler_t hawk_usb_ocic_handler; static const short da850_hawk_usb11_pins[] = { DA850_GPIO2_4, DA850_GPIO6_13, -1 }; static int hawk_usb_set_power(unsigned port, int on) { gpio_set_value(DA850_USB1_VBUS_PIN, on); return 0; } static int hawk_usb_get_power(unsigned port) { return gpio_get_value(DA850_USB1_VBUS_PIN); } static int hawk_usb_get_oci(unsigned port) { return !gpio_get_value(DA850_USB1_OC_PIN); } static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler) { int irq = gpio_to_irq(DA850_USB1_OC_PIN); int error = 0; if (handler != NULL) { hawk_usb_ocic_handler = handler; error = request_irq(irq, omapl138_hawk_usb_ocic_irq, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "OHCI over-current indicator", NULL); if (error) pr_err("%s: could not request IRQ to watch " "over-current indicator changes\n", __func__); } else { free_irq(irq, NULL); } return error; } static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = { .set_power = hawk_usb_set_power, .get_power = hawk_usb_get_power, .get_oci = hawk_usb_get_oci, .ocic_notify = hawk_usb_ocic_notify, /* TPS2087 switch @ 5V */ .potpgt = (3 + 1) / 2, /* 3 ms max */ }; static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id) { hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1); return IRQ_HANDLED; } static __init void omapl138_hawk_usb_init(void) { int ret; u32 cfgchip2; ret = davinci_cfg_reg_list(da850_hawk_usb11_pins); if (ret) { pr_warning("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); return; } /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); cfgchip2 &= ~CFGCHIP2_REFFREQ; cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); ret = gpio_request_one(DA850_USB1_VBUS_PIN, GPIOF_DIR_OUT, "USB1 VBUS"); if (ret < 0) { pr_err("%s: failed to request GPIO for USB 1.1 port " "power control: %d\n", __func__, ret); return; } ret = gpio_request_one(DA850_USB1_OC_PIN, GPIOF_DIR_IN, "USB1 OC"); if (ret < 0) { pr_err("%s: failed to request GPIO for USB 1.1 port " "over-current indicator: %d\n", __func__, ret); goto usb11_setup_oc_fail; } ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata); if (ret) { pr_warning("%s: USB 1.1 registration failed: %d\n", __func__, ret); goto usb11_setup_fail; } return; usb11_setup_fail: gpio_free(DA850_USB1_OC_PIN); usb11_setup_oc_fail: gpio_free(DA850_USB1_VBUS_PIN); } static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { .enabled_uarts = 0x7, Loading @@ -30,6 +303,17 @@ static __init void omapl138_hawk_init(void) davinci_serial_init(&omapl138_hawk_uart_config); omapl138_hawk_config_emac(); ret = da850_register_edma(da850_edma_rsv); if (ret) pr_warning("%s: EDMA registration failed: %d\n", __func__, ret); omapl138_hawk_mmc_init(); omapl138_hawk_usb_init(); ret = da8xx_register_watchdog(); if (ret) pr_warning("omapl138_hawk_init: " Loading Loading
MAINTAINERS +2 −1 Original line number Diff line number Diff line Loading @@ -5658,7 +5658,8 @@ F: arch/arm/mach-s3c2410/bast-ide.c F: arch/arm/mach-s3c2410/bast-irq.c TI DAVINCI MACHINE SUPPORT M: Kevin Hilman <khilman@deeprootsystems.com> M: Sekhar Nori <nsekhar@ti.com> M: Kevin Hilman <khilman@ti.com> L: davinci-linux-open-source@linux.davincidsp.com (subscribers-only) Q: http://patchwork.kernel.org/project/linux-davinci/list/ S: Supported Loading
arch/arm/mach-davinci/board-da830-evm.c +67 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,8 @@ #include <linux/i2c/at24.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -30,6 +32,7 @@ #include <mach/da8xx.h> #include <mach/usb.h> #include <mach/aemif.h> #include <mach/spi.h> #define DA830_EVM_PHY_ID "" /* Loading Loading @@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = { }, }; static struct mtd_partition da830evm_spiflash_part[] = { [0] = { .name = "DSP-UBL", .offset = 0, .size = SZ_8K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "ARM-UBL", .offset = MTDPART_OFS_APPEND, .size = SZ_16K + SZ_8K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "U-Boot", .offset = MTDPART_OFS_APPEND, .size = SZ_256K - SZ_32K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "U-Boot-Environment", .offset = MTDPART_OFS_APPEND, .size = SZ_16K, .mask_flags = 0, }, [4] = { .name = "Kernel", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, }; static struct flash_platform_data da830evm_spiflash_data = { .name = "m25p80", .parts = da830evm_spiflash_part, .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), .type = "w25x32", }; static struct davinci_spi_config da830evm_spiflash_cfg = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info da830evm_spi_info[] = { { .modalias = "m25p80", .platform_data = &da830evm_spiflash_data, .controller_data = &da830evm_spiflash_cfg, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 0, .chip_select = 0, }, }; static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; Loading Loading @@ -590,6 +651,12 @@ static __init void da830_evm_init(void) ret = da8xx_register_rtc(); if (ret) pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); ret = da8xx_register_spi(0, da830evm_spi_info, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warning("da830_evm_init: spi 0 registration failed: %d\n", ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE Loading
arch/arm/mach-davinci/board-da850-evm.c +90 −6 Original line number Diff line number Diff line Loading @@ -29,6 +29,8 @@ #include <linux/regulator/machine.h> #include <linux/regulator/tps6507x.h> #include <linux/input/tps6507x-ts.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -38,6 +40,7 @@ #include <mach/nand.h> #include <mach/mux.h> #include <mach/aemif.h> #include <mach/spi.h> #define DA850_EVM_PHY_ID "0:00" #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) Loading @@ -48,6 +51,70 @@ #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) static struct mtd_partition da850evm_spiflash_part[] = { [0] = { .name = "UBL", .offset = 0, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "U-Boot", .offset = MTDPART_OFS_APPEND, .size = SZ_512K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "U-Boot-Env", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "Kernel", .offset = MTDPART_OFS_APPEND, .size = SZ_2M + SZ_512K, .mask_flags = 0, }, [4] = { .name = "Filesystem", .offset = MTDPART_OFS_APPEND, .size = SZ_4M, .mask_flags = 0, }, [5] = { .name = "MAC-Address", .offset = SZ_8M - SZ_64K, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, }; static struct flash_platform_data da850evm_spiflash_data = { .name = "m25p80", .parts = da850evm_spiflash_part, .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), .type = "m25p64", }; static struct davinci_spi_config da850evm_spiflash_cfg = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info da850evm_spi_info[] = { { .modalias = "m25p80", .platform_data = &da850evm_spiflash_data, .controller_data = &da850evm_spiflash_cfg, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 1, .chip_select = 0, }, }; static struct mtd_partition da850_evm_norflash_partition[] = { { .name = "bootloaders + env", Loading Loading @@ -231,8 +298,6 @@ static const short da850_evm_nor_pins[] = { -1 }; static u32 ui_card_detected; #if defined(CONFIG_MMC_DAVINCI) || \ defined(CONFIG_MMC_DAVINCI_MODULE) #define HAS_MMC 1 Loading @@ -244,7 +309,7 @@ static inline void da850_evm_setup_nor_nand(void) { int ret = 0; if (ui_card_detected & !HAS_MMC) { if (!HAS_MMC) { ret = davinci_cfg_reg_list(da850_evm_nand_pins); if (ret) pr_warning("da850_evm_init: nand mux setup failed: " Loading Loading @@ -394,7 +459,6 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, goto exp_setup_keys_fail; } ui_card_detected = 1; pr_info("DA850/OMAP-L138 EVM UI card detected\n"); da850_evm_setup_nor_nand(); Loading Loading @@ -664,6 +728,13 @@ static struct snd_platform_data da850_evm_snd_data = { .rxnumevt = 1, }; static const short da850_evm_mcasp_pins[] __initconst = { DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, DA850_AXR_11, DA850_AXR_12, -1 }; static int da850_evm_mmc_get_ro(int index) { return gpio_get_value(DA850_MMCSD_WP_PIN); Loading @@ -683,6 +754,13 @@ static struct davinci_mmc_config da850_mmc_config = { .version = MMC_CTLR_VERSION_2, }; static const short da850_evm_mmcsd0_pins[] __initconst = { DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, DA850_GPIO4_0, DA850_GPIO4_1, -1 }; static void da850_panel_power_ctrl(int val) { /* lcd backlight */ Loading Loading @@ -1070,7 +1148,7 @@ static __init void da850_evm_init(void) ret); if (HAS_MMC) { ret = davinci_cfg_reg_list(da850_mmcsd0_pins); ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); if (ret) pr_warning("da850_evm_init: mmcsd0 mux setup failed:" " %d\n", ret); Loading Loading @@ -1106,7 +1184,7 @@ static __init void da850_evm_init(void) __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); ret = davinci_cfg_reg_list(da850_mcasp_pins); ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); if (ret) pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", ret); Loading Loading @@ -1153,6 +1231,12 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: suspend registration failed: %d\n", ret); ret = da8xx_register_spi(1, da850evm_spi_info, ARRAY_SIZE(da850evm_spi_info)); if (ret) pr_warning("da850_evm_init: spi 1 registration failed: %d\n", ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE Loading
arch/arm/mach-davinci/board-mityomapl138.c +159 −8 Original line number Diff line number Diff line Loading @@ -17,6 +17,8 @@ #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/etherdevice.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> Loading @@ -25,6 +27,7 @@ #include <mach/da8xx.h> #include <mach/nand.h> #include <mach/mux.h> #include <mach/spi.h> #define MITYOMAPL138_PHY_ID "0:03" Loading @@ -44,38 +47,109 @@ struct factory_config { static struct factory_config factory_config; struct part_no_info { const char *part_no; /* part number string of interest */ int max_freq; /* khz */ }; static struct part_no_info mityomapl138_pn_info[] = { { .part_no = "L138-C", .max_freq = 300000, }, { .part_no = "L138-D", .max_freq = 375000, }, { .part_no = "L138-F", .max_freq = 456000, }, { .part_no = "1808-C", .max_freq = 300000, }, { .part_no = "1808-D", .max_freq = 375000, }, { .part_no = "1808-F", .max_freq = 456000, }, { .part_no = "1810-D", .max_freq = 375000, }, }; #ifdef CONFIG_CPU_FREQ static void mityomapl138_cpufreq_init(const char *partnum) { int i, ret; for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) { /* * the part number has additional characters beyond what is * stored in the table. This information is not needed for * determining the speed grade, and would require several * more table entries. Only check the first N characters * for a match. */ if (!strncmp(partnum, mityomapl138_pn_info[i].part_no, strlen(mityomapl138_pn_info[i].part_no))) { da850_max_speed = mityomapl138_pn_info[i].max_freq; break; } } ret = da850_register_cpufreq("pll0_sysclk3"); if (ret) pr_warning("cpufreq registration failed: %d\n", ret); } #else static void mityomapl138_cpufreq_init(const char *partnum) { } #endif static void read_factory_config(struct memory_accessor *a, void *context) { int ret; const char *partnum = NULL; struct davinci_soc_info *soc_info = &davinci_soc_info; ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config)); if (ret != sizeof(struct factory_config)) { pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n", ret); return; goto bad_config; } if (factory_config.magic != FACTORY_CONFIG_MAGIC) { pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n", factory_config.magic); return; goto bad_config; } if (factory_config.version != FACTORY_CONFIG_VERSION) { pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n", factory_config.version); return; goto bad_config; } pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac); pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum); if (is_valid_ether_addr(factory_config.mac)) memcpy(soc_info->emac_pdata->mac_addr, factory_config.mac, ETH_ALEN); else pr_warning("MityOMAPL138: Invalid MAC found " "in factory config block\n"); partnum = factory_config.partnum; pr_info("MityOMAPL138: Part Number = %s\n", partnum); bad_config: /* default maximum speed is valid for all platforms */ mityomapl138_cpufreq_init(partnum); } static struct at24_platform_data mityomapl138_fd_chip = { Loading Loading @@ -222,6 +296,82 @@ static int __init pmic_tps65023_init(void) ARRAY_SIZE(mityomap_tps65023_info)); } /* * SPI Devices: * SPI1_CS0: 8M Flash ST-M25P64-VME6G */ static struct mtd_partition spi_flash_partitions[] = { [0] = { .name = "ubl", .offset = 0, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "u-boot", .offset = MTDPART_OFS_APPEND, .size = SZ_512K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "u-boot-env", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "periph-config", .offset = MTDPART_OFS_APPEND, .size = SZ_64K, .mask_flags = MTD_WRITEABLE, }, [4] = { .name = "reserved", .offset = MTDPART_OFS_APPEND, .size = SZ_256K + SZ_64K, }, [5] = { .name = "kernel", .offset = MTDPART_OFS_APPEND, .size = SZ_2M + SZ_1M, }, [6] = { .name = "fpga", .offset = MTDPART_OFS_APPEND, .size = SZ_2M, }, [7] = { .name = "spare", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, }, }; static struct flash_platform_data mityomapl138_spi_flash_data = { .name = "m25p80", .parts = spi_flash_partitions, .nr_parts = ARRAY_SIZE(spi_flash_partitions), .type = "m24p64", }; static struct davinci_spi_config spi_eprom_config = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info mityomapl138_spi_flash_info[] = { { .modalias = "m25p80", .platform_data = &mityomapl138_spi_flash_data, .controller_data = &spi_eprom_config, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 1, .chip_select = 0, }, }; /* * MityDSP-L138 includes a 256 MByte large-page NAND flash * (128K blocks). Loading Loading @@ -377,16 +527,17 @@ static void __init mityomapl138_init(void) mityomapl138_setup_nand(); ret = da8xx_register_spi(1, mityomapl138_spi_flash_info, ARRAY_SIZE(mityomapl138_spi_flash_info)); if (ret) pr_warning("spi 1 registration failed: %d\n", ret); mityomapl138_config_emac(); ret = da8xx_register_rtc(); if (ret) pr_warning("rtc setup failed: %d\n", ret); ret = da850_register_cpufreq("pll0_sysclk3"); if (ret) pr_warning("cpufreq registration failed: %d\n", ret); ret = da8xx_register_cpuidle(); if (ret) pr_warning("cpuidle registration failed: %d\n", ret); Loading
arch/arm/mach-davinci/board-omapl138-hawk.c +284 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,279 @@ #include <mach/cp_intc.h> #include <mach/da8xx.h> #include <mach/mux.h> #define HAWKBOARD_PHY_ID "0:07" #define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) #define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) #define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4) #define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13) static short omapl138_hawk_mii_pins[] __initdata = { DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, DA850_MDIO_D, -1 }; static __init void omapl138_hawk_config_emac(void) { void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); int ret; u32 val; struct davinci_soc_info *soc_info = &davinci_soc_info; val = __raw_readl(cfgchip3); val &= ~BIT(8); ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins); if (ret) { pr_warning("%s: cpgmac/mii mux setup failed: %d\n", __func__, ret); return; } /* configure the CFGCHIP3 register for MII */ __raw_writel(val, cfgchip3); pr_info("EMAC: MII PHY configured\n"); soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; ret = da8xx_register_emac(); if (ret) pr_warning("%s: emac registration failed: %d\n", __func__, ret); } /* * The following EDMA channels/slots are not being used by drivers (for * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard, * hence they are being reserved for codecs on the DSP side. */ static const s16 da850_dma0_rsv_chans[][2] = { /* (offset, number) */ { 8, 6}, {24, 4}, {30, 2}, {-1, -1} }; static const s16 da850_dma0_rsv_slots[][2] = { /* (offset, number) */ { 8, 6}, {24, 4}, {30, 50}, {-1, -1} }; static const s16 da850_dma1_rsv_chans[][2] = { /* (offset, number) */ { 0, 28}, {30, 2}, {-1, -1} }; static const s16 da850_dma1_rsv_slots[][2] = { /* (offset, number) */ { 0, 28}, {30, 90}, {-1, -1} }; static struct edma_rsv_info da850_edma_cc0_rsv = { .rsv_chans = da850_dma0_rsv_chans, .rsv_slots = da850_dma0_rsv_slots, }; static struct edma_rsv_info da850_edma_cc1_rsv = { .rsv_chans = da850_dma1_rsv_chans, .rsv_slots = da850_dma1_rsv_slots, }; static struct edma_rsv_info *da850_edma_rsv[2] = { &da850_edma_cc0_rsv, &da850_edma_cc1_rsv, }; static const short hawk_mmcsd0_pins[] = { DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, DA850_GPIO3_12, DA850_GPIO3_13, -1 }; static int da850_hawk_mmc_get_ro(int index) { return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN); } static int da850_hawk_mmc_get_cd(int index) { return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN); } static struct davinci_mmc_config da850_mmc_config = { .get_ro = da850_hawk_mmc_get_ro, .get_cd = da850_hawk_mmc_get_cd, .wires = 4, .max_freq = 50000000, .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, .version = MMC_CTLR_VERSION_2, }; static __init void omapl138_hawk_mmc_init(void) { int ret; ret = davinci_cfg_reg_list(hawk_mmcsd0_pins); if (ret) { pr_warning("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret); return; } ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN, GPIOF_DIR_IN, "MMC CD"); if (ret < 0) { pr_warning("%s: can not open GPIO %d\n", __func__, DA850_HAWK_MMCSD_CD_PIN); return; } ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN, GPIOF_DIR_IN, "MMC WP"); if (ret < 0) { pr_warning("%s: can not open GPIO %d\n", __func__, DA850_HAWK_MMCSD_WP_PIN); goto mmc_setup_wp_fail; } ret = da8xx_register_mmcsd0(&da850_mmc_config); if (ret) { pr_warning("%s: MMC/SD0 registration failed: %d\n", __func__, ret); goto mmc_setup_mmcsd_fail; } return; mmc_setup_mmcsd_fail: gpio_free(DA850_HAWK_MMCSD_WP_PIN); mmc_setup_wp_fail: gpio_free(DA850_HAWK_MMCSD_CD_PIN); } static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id); static da8xx_ocic_handler_t hawk_usb_ocic_handler; static const short da850_hawk_usb11_pins[] = { DA850_GPIO2_4, DA850_GPIO6_13, -1 }; static int hawk_usb_set_power(unsigned port, int on) { gpio_set_value(DA850_USB1_VBUS_PIN, on); return 0; } static int hawk_usb_get_power(unsigned port) { return gpio_get_value(DA850_USB1_VBUS_PIN); } static int hawk_usb_get_oci(unsigned port) { return !gpio_get_value(DA850_USB1_OC_PIN); } static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler) { int irq = gpio_to_irq(DA850_USB1_OC_PIN); int error = 0; if (handler != NULL) { hawk_usb_ocic_handler = handler; error = request_irq(irq, omapl138_hawk_usb_ocic_irq, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "OHCI over-current indicator", NULL); if (error) pr_err("%s: could not request IRQ to watch " "over-current indicator changes\n", __func__); } else { free_irq(irq, NULL); } return error; } static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = { .set_power = hawk_usb_set_power, .get_power = hawk_usb_get_power, .get_oci = hawk_usb_get_oci, .ocic_notify = hawk_usb_ocic_notify, /* TPS2087 switch @ 5V */ .potpgt = (3 + 1) / 2, /* 3 ms max */ }; static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id) { hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1); return IRQ_HANDLED; } static __init void omapl138_hawk_usb_init(void) { int ret; u32 cfgchip2; ret = davinci_cfg_reg_list(da850_hawk_usb11_pins); if (ret) { pr_warning("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); return; } /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); cfgchip2 &= ~CFGCHIP2_REFFREQ; cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); ret = gpio_request_one(DA850_USB1_VBUS_PIN, GPIOF_DIR_OUT, "USB1 VBUS"); if (ret < 0) { pr_err("%s: failed to request GPIO for USB 1.1 port " "power control: %d\n", __func__, ret); return; } ret = gpio_request_one(DA850_USB1_OC_PIN, GPIOF_DIR_IN, "USB1 OC"); if (ret < 0) { pr_err("%s: failed to request GPIO for USB 1.1 port " "over-current indicator: %d\n", __func__, ret); goto usb11_setup_oc_fail; } ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata); if (ret) { pr_warning("%s: USB 1.1 registration failed: %d\n", __func__, ret); goto usb11_setup_fail; } return; usb11_setup_fail: gpio_free(DA850_USB1_OC_PIN); usb11_setup_oc_fail: gpio_free(DA850_USB1_VBUS_PIN); } static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { .enabled_uarts = 0x7, Loading @@ -30,6 +303,17 @@ static __init void omapl138_hawk_init(void) davinci_serial_init(&omapl138_hawk_uart_config); omapl138_hawk_config_emac(); ret = da850_register_edma(da850_edma_rsv); if (ret) pr_warning("%s: EDMA registration failed: %d\n", __func__, ret); omapl138_hawk_mmc_init(); omapl138_hawk_usb_init(); ret = da8xx_register_watchdog(); if (ret) pr_warning("omapl138_hawk_init: " Loading