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Commit 5797e93a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add transaction timeout config for shima"

parents da8bf200 a452e220

qcom/shima.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -632,6 +632,8 @@ 
		reg = <0x117f000 0x1000>,

		      <0x1112000 0x6000>;



		qcom,transaction_timeout = <0>;



		reg-names = "dcc-base", "dcc-ram-base";

		dcc-ram-offset = <0x12000>;

	};