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Commit 578d2342 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-next-5.4-2019-08-23' of git://people.freedesktop.org/~agd5f/linux into drm-next 



drm-next-5.4-2019-08-23:

amdgpu:
- Enable power features on Navi12
- Enable power features on Arcturus
- RAS updates
- Initial Renoir APU support
- Enable power featyres on Renoir
- DC gamma fixes
- DCN2 fixes
- GPU reset support for Picasso
- Misc cleanups and fixes

scheduler:
- Possible race fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823202620.3870-1-alexander.deucher@amd.com
parents c8723711 b4d857de

drivers/gpu/drm/amd/amdgpu/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -100,7 +100,8 @@ amdgpu-y += \ 
	amdgpu_psp.o \

	psp_v3_1.o \

	psp_v10_0.o \

	psp_v11_0.o

	psp_v11_0.o \

	psp_v12_0.o



# add SMC block

amdgpu-y += \
@@ -154,6 +155,7 @@ amdgpu-y += \ 


# add ATHUB block

amdgpu-y += \

	athub_v1_0.o \

	athub_v2_0.o



# add amdkfd interfaces

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −1
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ 
#include "amdgpu_discovery.h"

#include "amdgpu_mes.h"

#include "amdgpu_umc.h"

#include "amdgpu_mmhub.h"



#define MAX_GPU_INSTANCE		16
@@ -788,7 +789,6 @@ struct amdgpu_device { 
	int				usec_timeout;

	const struct amdgpu_asic_funcs	*asic_funcs;

	bool				shutdown;

	bool				need_dma32;

	bool				need_swiotlb;

	bool				accel_working;

	struct notifier_block		acpi_nb;
@@ -976,6 +976,7 @@ struct amdgpu_device { 


	const struct amdgpu_nbio_funcs	*nbio_funcs;

	const struct amdgpu_df_funcs	*df_funcs;

	const struct amdgpu_mmhub_funcs	*mmhub_funcs;



	/* delayed work_func for deferring clockgating during resume */

	struct delayed_work     delayed_init_work;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

+3 −38
Original line number Diff line number Diff line
@@ -801,42 +801,6 @@ static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, 
	return reg & ATC_VMID0_PASID_MAPPING__PASID_MASK;

}



static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)

{

	struct amdgpu_device *adev = (struct amdgpu_device *) kgd;

	uint32_t req = (1 << vmid) |

		(0 << GCVM_INVALIDATE_ENG0_REQ__FLUSH_TYPE__SHIFT) |/* legacy */

		GCVM_INVALIDATE_ENG0_REQ__INVALIDATE_L2_PTES_MASK |

		GCVM_INVALIDATE_ENG0_REQ__INVALIDATE_L2_PDE0_MASK |

		GCVM_INVALIDATE_ENG0_REQ__INVALIDATE_L2_PDE1_MASK |

		GCVM_INVALIDATE_ENG0_REQ__INVALIDATE_L2_PDE2_MASK |

		GCVM_INVALIDATE_ENG0_REQ__INVALIDATE_L1_PTES_MASK;



	mutex_lock(&adev->srbm_mutex);



	/* Use light weight invalidation.

	 *

	 * TODO 1: agree on the right set of invalidation registers for

	 * KFD use. Use the last one for now. Invalidate only GCHUB as

	 * SDMA is now moved to GCHUB

	 *

	 * TODO 2: support range-based invalidation, requires kfg2kgd

	 * interface change

	 */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32),

				0xffffffff);

	WREG32(SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32),

				0x0000001f);



	WREG32(SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ), req);



	while (!(RREG32(SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ACK)) &

					(1 << vmid)))

		cpu_relax();



	mutex_unlock(&adev->srbm_mutex);

}



static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid)

{

	signed long r;
@@ -877,7 +841,8 @@ static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid) 
		if (get_atc_vmid_pasid_mapping_valid(kgd, vmid)) {

			if (get_atc_vmid_pasid_mapping_pasid(kgd, vmid)

				== pasid) {

				write_vmid_invalidate_request(kgd, vmid);

				amdgpu_gmc_flush_gpu_tlb(adev, vmid,

						AMDGPU_GFXHUB_0, 0);

				break;

			}

		}
@@ -895,7 +860,7 @@ static int invalidate_tlbs_vmid(struct kgd_dev *kgd, uint16_t vmid) 
		return 0;

	}



	write_vmid_invalidate_request(kgd, vmid);

	amdgpu_gmc_flush_gpu_tlb(adev, vmid, AMDGPU_GFXHUB_0, 0);

	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

+8 −4
Original line number Diff line number Diff line
@@ -670,7 +670,7 @@ static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid, 
int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid)

{

	struct amdgpu_device *adev = (struct amdgpu_device *) kgd;

	int vmid;

	int vmid, i;

	struct amdgpu_ring *ring = &adev->gfx.kiq.ring;

	uint32_t flush_type = 0;
@@ -689,8 +689,9 @@ int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid) 
		if (kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid(kgd, vmid)) {

			if (kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid(kgd, vmid)

				== pasid) {

				for (i = 0; i < adev->num_vmhubs; i++)

					amdgpu_gmc_flush_gpu_tlb(adev, vmid,

							 flush_type);

								i, flush_type);

				break;

			}

		}
@@ -702,6 +703,7 @@ int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid) 
int kgd_gfx_v9_invalidate_tlbs_vmid(struct kgd_dev *kgd, uint16_t vmid)

{

	struct amdgpu_device *adev = (struct amdgpu_device *) kgd;

	int i;



	if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {

		pr_err("non kfd vmid %d\n", vmid);
@@ -723,7 +725,9 @@ int kgd_gfx_v9_invalidate_tlbs_vmid(struct kgd_dev *kgd, uint16_t vmid) 
	 * TODO 2: support range-based invalidation, requires kfg2kgd

	 * interface change

	 */

	amdgpu_gmc_flush_gpu_tlb(adev, vmid, 0);

	for (i = 0; i < adev->num_vmhubs; i++)

		amdgpu_gmc_flush_gpu_tlb(adev, vmid, i, 0);



	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+7 −2
Original line number Diff line number Diff line
@@ -1143,6 +1143,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p, 
	num_deps = chunk->length_dw * 4 /

		sizeof(struct drm_amdgpu_cs_chunk_sem);



	if (p->post_deps)

		return -EINVAL;



	p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),

				     GFP_KERNEL);

	p->num_post_deps = 0;
@@ -1166,8 +1169,7 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p, 




static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p,

						      struct amdgpu_cs_chunk

						      *chunk)

						      struct amdgpu_cs_chunk *chunk)

{

	struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps;

	unsigned num_deps;
@@ -1177,6 +1179,9 @@ static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p 
	num_deps = chunk->length_dw * 4 /

		sizeof(struct drm_amdgpu_cs_chunk_syncobj);



	if (p->post_deps)

		return -EINVAL;



	p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),

				     GFP_KERNEL);

	p->num_post_deps = 0;