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Commit 5774f9fa authored by Xiaoyao Li's avatar Xiaoyao Li Committed by Sasha Levin
Browse files

KVM: X86: Fix MSR range of APIC registers in X2APIC mode 



commit bf10bd0be53282183f374af23577b18b5fbf7801 upstream.

Only MSR address range 0x800 through 0x8ff is architecturally reserved
and dedicated for accessing APIC registers in x2APIC mode.

Fixes: 0105d1a5 ("KVM: x2apic interface to lapic")
Signed-off-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20200616073307.16440-1-xiaoyao.li@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Reviewed-by: default avatarJim Mattson <jmattson@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0236040f

arch/x86/kvm/x86.c

+2 −2
Original line number Diff line number Diff line
@@ -2753,7 +2753,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		return kvm_mtrr_set_msr(vcpu, msr, data);

	case MSR_IA32_APICBASE:

		return kvm_set_apic_base(vcpu, msr_info);

	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:

	case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:

		return kvm_x2apic_msr_write(vcpu, msr, data);

	case MSR_IA32_TSCDEADLINE:

		kvm_set_lapic_tscdeadline_msr(vcpu, data);
@@ -3057,7 +3057,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
	case MSR_IA32_APICBASE:

		msr_info->data = kvm_get_apic_base(vcpu);

		break;

	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:

	case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:

		return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);

		break;

	case MSR_IA32_TSCDEADLINE: