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Commit 575e3216 authored by David Woodhouse's avatar David Woodhouse Committed by Paul Mackerras
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[PATCH] powerpc: Make CHRP build again



This makes CHRP build again, although it's untested because my Pegasos
is currently in pieces.

Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 91dc182c
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+17 −10
Original line number Diff line number Diff line
@@ -135,12 +135,13 @@ int __init
hydra_init(void)
{
	struct device_node *np;
	struct resource r;

	np = find_devices("mac-io");
	if (np == NULL || np->n_addrs == 0)
	if (np == NULL || of_address_to_resource(np, 0, &r))
		return 0;
	Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
	printk("Hydra Mac I/O at %lx\n", np->addrs[0].address);
	Hydra = ioremap(r.start, r.end-r.start);
	printk("Hydra Mac I/O at %lx\n", r.start);
	printk("Hydra Feature_Control was %x",
	       in_le32(&Hydra->Feature_Control));
	out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
@@ -177,18 +178,24 @@ setup_python(struct pci_controller *hose, struct device_node *dev)
{
	u32 __iomem *reg;
	u32 val;
	unsigned long addr = dev->addrs[0].address;
	struct resource r;

	setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
	if (of_address_to_resource(dev, 0, &r)) {
		printk(KERN_ERR "No address for Python PCI controller\n");
		return;
	}

	/* Clear the magic go-slow bit */
	reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
	reg = ioremap(r.start + 0xf6000, 0x40);
	BUG_ON(!reg); 
	val = in_be32(&reg[12]);
	if (val & PRG_CL_RESET_VALID) {
		out_be32(&reg[12], val & ~PRG_CL_RESET_VALID);
		in_be32(&reg[12]);
	}
	iounmap(reg);

	setup_indirect_pci(hose, r.start + 0xf8000, r.start + 0xf8010);
}

/* Marvell Discovery II based Pegasos 2 */
@@ -218,7 +225,7 @@ chrp_find_bridges(void)
	char *model, *machine;
	int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
	struct device_node *root = find_path_device("/");

	struct resource r;
	/*
	 * The PCI host bridge nodes on some machines don't have
	 * properties to adequately identify them, so we have to
@@ -238,7 +245,7 @@ chrp_find_bridges(void)
			continue;
		++index;
		/* The GG2 bridge on the LongTrail doesn't have an address */
		if (dev->n_addrs < 1 && !is_longtrail) {
		if (of_address_to_resource(dev, 0, &r) && !is_longtrail) {
			printk(KERN_WARNING "Can't use %s: no address\n",
			       dev->full_name);
			continue;
@@ -255,8 +262,8 @@ chrp_find_bridges(void)
			printk(KERN_INFO "PCI buses %d..%d",
			       bus_range[0], bus_range[1]);
		printk(" controlled by %s", dev->type);
		if (dev->n_addrs > 0)
			printk(" at %lx", dev->addrs[0].address);
		if (!is_longtrail)
			printk(" at %lx", r.start);
		printk("\n");

		hose = pcibios_alloc_controller();
+4 −3
Original line number Diff line number Diff line
@@ -352,9 +352,10 @@ static void __init chrp_find_openpic(void)
		opaddr = opprop[na-1];	/* assume 32-bit */
		oplen /= na * sizeof(unsigned int);
	} else {
		if (np->n_addrs == 0)
		struct resource r;
		if (of_address_to_resource(np, 0, &r))
			return;
		opaddr = np->addrs[0].address;
		opaddr = r.start;
		oplen = 0;
	}

@@ -377,7 +378,7 @@ static void __init chrp_find_openpic(void)
	 */
	if (oplen < len) {
		printk(KERN_ERR "Insufficient addresses for distributed"
		       " OpenPIC (%d < %d)\n", np->n_addrs, len);
		       " OpenPIC (%d < %d)\n", oplen, len);
		len = oplen;
	}

+5 −2
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@
#include <linux/mc146818rtc.h>
#include <linux/init.h>
#include <linux/bcd.h>
#include <linux/ioport.h>

#include <asm/io.h>
#include <asm/nvram.h>
@@ -37,14 +38,16 @@ static int nvram_data = NVRAM_DATA;
long __init chrp_time_init(void)
{
	struct device_node *rtcs;
	struct resource r;
	int base;

	rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
	if (rtcs == NULL)
		rtcs = find_compatible_devices("rtc", "ds1385-rtc");
	if (rtcs == NULL || rtcs->addrs == NULL)
	if (rtcs == NULL || of_address_to_resource(rtcs, 0, &r))
		return 0;
	base = rtcs->addrs[0].address;
	
	base = r.start;
	nvram_as1 = 0;
	nvram_as0 = base;
	nvram_data = base + 1;