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Commit 5736603b authored by Seung-Woo Kim's avatar Seung-Woo Kim Committed by Inki Dae
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drm/exynos: fixed blending for hdmi graphic layer 



Blending for graphic layer 0 of hdmi mixer was not set so video
layer cannot be showed if graphic layer 0 is enabled.
This patch fixes blending values to support blending between
graphic layer 0 and video layer.

Signed-off-by: default avatarSeung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent f56fdcef

drivers/gpu/drm/exynos/exynos_mixer.c

+6 −4
Original line number Diff line number Diff line
@@ -601,18 +601,20 @@ static void mixer_win_reset(struct mixer_context *ctx) 
	mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);



	/* setting graphical layers */



	val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */

	val |= MXR_GRP_CFG_WIN_BLEND_EN;

	val |= MXR_GRP_CFG_BLEND_PRE_MUL;

	val |= MXR_GRP_CFG_PIXEL_BLEND_EN;

	val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */



	/* the same configuration for both layers */

	mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);



	val |= MXR_GRP_CFG_BLEND_PRE_MUL;

	val |= MXR_GRP_CFG_PIXEL_BLEND_EN;

	mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);



	/* setting video layers */

	val = MXR_GRP_CFG_ALPHA_VAL(0);

	mixer_reg_write(res, MXR_VIDEO_CFG, val);



	/* configuration of Video Processor Registers */

	vp_win_reset(ctx);

	vp_default_filter(res);