Loading drivers/gpu/drm/nouveau/dispnv50/Kbuild +3 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ nouveau-y += dispnv50/core827d.o nouveau-y += dispnv50/core907d.o nouveau-y += dispnv50/core917d.o nouveau-y += dispnv50/corec37d.o nouveau-y += dispnv50/corec57d.o nouveau-y += dispnv50/dac507d.o nouveau-y += dispnv50/dac907d.o Loading @@ -23,12 +24,14 @@ nouveau-y += dispnv50/head827d.o nouveau-y += dispnv50/head907d.o nouveau-y += dispnv50/head917d.o nouveau-y += dispnv50/headc37d.o nouveau-y += dispnv50/headc57d.o nouveau-y += dispnv50/wimm.o nouveau-y += dispnv50/wimmc37b.o nouveau-y += dispnv50/wndw.o nouveau-y += dispnv50/wndwc37e.o nouveau-y += dispnv50/wndwc57e.o nouveau-y += dispnv50/base.o nouveau-y += dispnv50/base507c.o Loading drivers/gpu/drm/nouveau/dispnv50/atom.h +2 −2 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ struct nv50_head_atom { u64 offset:40; u8 buffer:1; u8 mode:4; u8 size:2; u16 size:11; u8 range:2; u8 output_mode:2; void (*load)(struct drm_color_lut *, int size, void __iomem *); Loading Loading @@ -170,7 +170,7 @@ struct nv50_wndw_atom { u8 buffer:1; u8 enable:2; u8 mode:4; u8 size:2; u16 size:11; u8 range:2; u8 output_mode:2; void (*load)(struct drm_color_lut *, int size, Loading drivers/gpu/drm/nouveau/dispnv50/core.c +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) int version; int (*new)(struct nouveau_drm *, s32, struct nv50_core **); } cores[] = { { TU104_DISP_CORE_CHANNEL_DMA, 0, corec57d_new }, { GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new }, { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, Loading drivers/gpu/drm/nouveau/dispnv50/core.h +4 −0 Original line number Diff line number Diff line Loading @@ -46,5 +46,9 @@ extern const struct nv50_outp_func sor907d; int core917d_new(struct nouveau_drm *, s32, struct nv50_core **); int corec37d_new(struct nouveau_drm *, s32, struct nv50_core **); int corec37d_ntfy_wait_done(struct nouveau_bo *, u32, struct nvif_device *); void corec37d_update(struct nv50_core *, u32 *, bool); extern const struct nv50_outp_func sorc37d; int corec57d_new(struct nouveau_drm *, s32, struct nv50_core **); #endif drivers/gpu/drm/nouveau/dispnv50/corec37d.c +2 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ #include <nouveau_bo.h> static void void corec37d_update(struct nv50_core *core, u32 *interlock, bool ntfy) { u32 *push; Loading Loading @@ -71,7 +71,7 @@ corec37d_ntfy_init(struct nouveau_bo *bo, u32 offset) nouveau_bo_wr32(bo, offset / 4 + 3, 0x00000000); } void static void corec37d_init(struct nv50_core *core) { const u32 windows = 8; /*XXX*/ Loading Loading
drivers/gpu/drm/nouveau/dispnv50/Kbuild +3 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ nouveau-y += dispnv50/core827d.o nouveau-y += dispnv50/core907d.o nouveau-y += dispnv50/core917d.o nouveau-y += dispnv50/corec37d.o nouveau-y += dispnv50/corec57d.o nouveau-y += dispnv50/dac507d.o nouveau-y += dispnv50/dac907d.o Loading @@ -23,12 +24,14 @@ nouveau-y += dispnv50/head827d.o nouveau-y += dispnv50/head907d.o nouveau-y += dispnv50/head917d.o nouveau-y += dispnv50/headc37d.o nouveau-y += dispnv50/headc57d.o nouveau-y += dispnv50/wimm.o nouveau-y += dispnv50/wimmc37b.o nouveau-y += dispnv50/wndw.o nouveau-y += dispnv50/wndwc37e.o nouveau-y += dispnv50/wndwc57e.o nouveau-y += dispnv50/base.o nouveau-y += dispnv50/base507c.o Loading
drivers/gpu/drm/nouveau/dispnv50/atom.h +2 −2 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ struct nv50_head_atom { u64 offset:40; u8 buffer:1; u8 mode:4; u8 size:2; u16 size:11; u8 range:2; u8 output_mode:2; void (*load)(struct drm_color_lut *, int size, void __iomem *); Loading Loading @@ -170,7 +170,7 @@ struct nv50_wndw_atom { u8 buffer:1; u8 enable:2; u8 mode:4; u8 size:2; u16 size:11; u8 range:2; u8 output_mode:2; void (*load)(struct drm_color_lut *, int size, Loading
drivers/gpu/drm/nouveau/dispnv50/core.c +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) int version; int (*new)(struct nouveau_drm *, s32, struct nv50_core **); } cores[] = { { TU104_DISP_CORE_CHANNEL_DMA, 0, corec57d_new }, { GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new }, { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, Loading
drivers/gpu/drm/nouveau/dispnv50/core.h +4 −0 Original line number Diff line number Diff line Loading @@ -46,5 +46,9 @@ extern const struct nv50_outp_func sor907d; int core917d_new(struct nouveau_drm *, s32, struct nv50_core **); int corec37d_new(struct nouveau_drm *, s32, struct nv50_core **); int corec37d_ntfy_wait_done(struct nouveau_bo *, u32, struct nvif_device *); void corec37d_update(struct nv50_core *, u32 *, bool); extern const struct nv50_outp_func sorc37d; int corec57d_new(struct nouveau_drm *, s32, struct nv50_core **); #endif
drivers/gpu/drm/nouveau/dispnv50/corec37d.c +2 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ #include <nouveau_bo.h> static void void corec37d_update(struct nv50_core *core, u32 *interlock, bool ntfy) { u32 *push; Loading Loading @@ -71,7 +71,7 @@ corec37d_ntfy_init(struct nouveau_bo *bo, u32 offset) nouveau_bo_wr32(bo, offset / 4 + 3, 0x00000000); } void static void corec37d_init(struct nv50_core *core) { const u32 windows = 8; /*XXX*/ Loading