Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 55f9aca2 authored by Mohan Kumar's avatar Mohan Kumar Committed by Greg Kroah-Hartman
Browse files

dmaengine: tegra210-adma: fix global intr clear



commit 9c7e355ccbb33d239360c876dbe49ad5ade65b47 upstream.

The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset

Fixes: ded1f3db ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarMohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20230102064844.31306-1-mkumard@nvidia.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5d993696
Loading
Loading
Loading
Loading
+1 −1
Original line number Original line Diff line number Diff line
@@ -224,7 +224,7 @@ static int tegra_adma_init(struct tegra_adma *tdma)
	int ret;
	int ret;


	/* Clear any interrupts */
	/* Clear any interrupts */
	tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
	tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);


	/* Assert soft reset */
	/* Assert soft reset */
	tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
	tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);