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Commit 55c78aa5 authored by chunhui dai's avatar chunhui dai Committed by CK Hu
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drm/mediatek: add clock factor for different IC



different IC has different clock designed in HDMI, the factor for
calculate clock should be different. Usinng the data in of_node
to find this factor.

Signed-off-by: default avatarchunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: default avatarCK Hu <ck.hu@mediatek.com>
parent 79080159
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+15 −9
Original line number Diff line number Diff line
@@ -113,6 +113,7 @@ struct mtk_dpi_yc_limit {
};

struct mtk_dpi_conf {
	unsigned int (*cal_factor)(int clock);
	u32 reg_h_fre_con;
	bool edge_sel_en;
};
@@ -431,15 +432,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
	unsigned int factor;

	/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */

	if (mode->clock <= 27000)
		factor = 3 << 4;
	else if (mode->clock <= 84000)
		factor = 3 << 3;
	else if (mode->clock <= 167000)
		factor = 3 << 2;
	else
		factor = 3 << 1;
	factor = dpi->conf->cal_factor(mode->clock);
	drm_display_mode_to_videomode(mode, &vm);
	pll_rate = vm.pixelclock * factor;

@@ -653,7 +646,20 @@ static const struct component_ops mtk_dpi_component_ops = {
	.unbind = mtk_dpi_unbind,
};

static unsigned int mt8173_calculate_factor(int clock)
{
	if (clock <= 27000)
		return 3 << 4;
	else if (clock <= 84000)
		return 3 << 3;
	else if (clock <= 167000)
		return 3 << 2;
	else
		return 3 << 1;
}

static const struct mtk_dpi_conf mt8173_conf = {
	.cal_factor = mt8173_calculate_factor,
	.reg_h_fre_con = 0xe0,
};