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Commit 5552e345 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add eMMC, SD card support for sdxlemur"

parents 90a1d855 e5ffd6c6
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+18 −0
Original line number Diff line number Diff line
@@ -8,6 +8,24 @@
	status = "ok";
};

&sdhc_1 {
	status = "ok";

	vdd-supply = <&vreg_sd_vdd>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&vreg_vddpx_2>;
	qcom,vdd-io-voltage-level = <1800000 2850000>;
	qcom,vdd-io-current-level = <0 10000>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc2_on>;
	pinctrl-1 = <&sdc2_off>;

	cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
};

&usb {
	extcon = <&vbus_detect>;
};
+28 −0
Original line number Diff line number Diff line
@@ -6,3 +6,31 @@
&pcie0 {
	qcom,boot-option = <0x1>;
};

&sdhc_1 {
	reg = <0x08804000 0x1000>, <0x08805000 0x1000>;
	reg-names = "hc_mem", "cqhci_mem";

	mmc-ddr-1_8v;
	mmc-hs200-1_8v;

	bus-width = <8>;
	non-removable;
	supports-cqe;

	vdd-supply = <&vreg_sd_vdd>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&L6B>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 200000>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc1_on>;
	pinctrl-1 = <&sdc1_off>;

	status = "ok";
};
+18 −0
Original line number Diff line number Diff line
@@ -8,6 +8,24 @@
	status = "ok";
};

&sdhc_1 {
	status = "ok";

	vdd-supply = <&vreg_sd_vdd>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&vreg_vddpx_2>;
	qcom,vdd-io-voltage-level = <1800000 2850000>;
	qcom,vdd-io-current-level = <0 10000>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc2_on>;
	pinctrl-1 = <&sdc2_off>;

	cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
};

&usb {
	extcon = <&vbus_detect>;
};
+92 −0
Original line number Diff line number Diff line
@@ -40,6 +40,98 @@
			};
		};

		sdc1_on: sdc1_on {
			clk {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <16>;
			};

			cmd {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <10>;
			};

			data {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <10>;
			};
		};

		sdc1_off: sdc1_off {
			clk {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <2>;
			};

			cmd {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <2>;
			};

			data {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <2>;
			};
		};

		sdc2_on: sdc2_on {
			clk {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <16>;
			};

			cmd {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <10>;
			};

			data {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <10>;
			};

			sd-cd {
				pins = "gpio99";
				bias-pull-up;
				drive-strength = <2>;
			};
		};

		sdc2_off: sdc2_off {
			clk {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <2>;
			};

			cmd {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <2>;
			};

			data {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <2>;
			};

			sd-cd {
				pins = "gpio99";
				bias-disable;
				drive-strength = <2>;
			};
		};

		pcie0 {
			pcie0_clkreq_default: pcie0_clkreq_default {
				mux {
+28 −0
Original line number Diff line number Diff line
@@ -432,6 +432,34 @@
		status = "disabled";
	};

	sdhc_1: sdhci@8804000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x08804000 0x1000>;
		reg-names = "hc_mem";

		interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hc_irq", "pwr_irq";

		clocks = <&gcc GCC_SDCC1_APPS_CLK>,
			<&gcc GCC_SDCC1_AHB_CLK>;
		clock-names = "core", "iface";

		bus-width = <4>;

		/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
		qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>;

		qcom,devfreq,freq-table = <50000000 200000000>;

		status = "disabled";

		qos0 {
			mask = <0x1>;
			vote = <44>;
		};
	};

	apsscc: clock-controller@17808100 {
		compatible = "qcom,sdxlemur-apsscc";
		clocks = <&rpmhcc RPMH_CXO_CLK_A>, <&gcc GPLL0_OUT_EVEN>;