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Commit 543c6754 authored by Mark Brown's avatar Mark Brown
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Merge tag 'asoc-v3.17' into asoc-linus

ASoC: Updates for v3.17

This has been a pretty exciting release in terms of the framework, we've
finally got support for multiple CODECs attached to a single DAI link
which has been something there's been interest in as long as I've been
working on ASoC.  A big thanks to Benoit and Misael for their work on
this.

Otherwise it's been a fairly standard release for development, including
more componentisation work from Lars-Peter and a good selection of both
CODEC and CPU drivers.

 - Support for multiple CODECs attached to a single DAI, enabling
   systems with for example multiple DAC/speaker drivers on a single
   link, contributed by Benoit Cousson based on work from Misael Lopez
   Cruz.
 - Support for byte controls larger than 256 bytes based on the use of
   TLVs contributed by Omair Mohammed Abdullah.
 - More componentisation work from Lars-Peter Clausen.
 - The remainder of the conversions of CODEC drivers to params_width()
 - Drivers for Cirrus Logic CS4265, Freescale i.MX ASRC blocks, Realtek
   RT286 and RT5670, Rockchip RK3xxx I2S controllers and Texas Instruments
   TAS2552.
 - Lots of updates and fixes, especially to the DaVinci, Intel,
   Freescale, Realtek, and rcar drivers.

# gpg: Signature made Mon 04 Aug 2014 17:13:21 BST using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
parents 2fa4a285 ae34a78c
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+4 −0
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@@ -10,10 +10,14 @@ Optional properties:

  - reset-gpio : a GPIO spec for the reset/power down pin.
		 If specified, it will be deasserted at probe time.
  - va-supply : a regulator spec, providing 5.0V
  - vd-supply : a regulator spec, providing 3.3V

Example:

spdif: ak5386@0 {
	compatible = "asahi-kasei,ak5386";
	reset-gpio = <&gpio0 23>;
	va-supply = <&vdd_5v0_reg>;
	vd-supply = <&vdd_3v3_reg>;
};
+29 −0
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CS4265 audio CODEC

This device supports I2C only.

Required properties:

  - compatible : "cirrus,cs4265"

  - reg : the I2C address of the device for I2C. The I2C address depends on
          the state of the AD0 pin.  If AD0 is high, the i2c address is 0x4f.
          If it is low, the i2c address is 0x4e.

Optional properties:

  - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
		 deasserted before communication to the codec starts.

Examples:

codec_ad0_high: cs4265@4f { /* AD0 Pin is high */
	compatible = "cirrus,cs4265";
	reg = <0x4f>;
};


codec_ad0_low: cs4265@4e { /* AD0 Pin is low */
	compatible = "cirrus,cs4265";
	reg = <0x4e>;
};
+60 −0
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Freescale Asynchronous Sample Rate Converter (ASRC) Controller

The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
signal associated with an input clock into a signal associated with a different
output clock. The driver currently works as a Front End of DPCM with other Back
Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support
three substreams within totally 10 channels.

Required properties:

  - compatible		: Contains "fsl,imx35-asrc" or "fsl,imx53-asrc".

  - reg			: Offset and length of the register set for the device.

  - interrupts		: Contains the spdif interrupt.

  - dmas		: Generic dma devicetree binding as described in
			  Documentation/devicetree/bindings/dma/dma.txt.

  - dma-names		: Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc".

  - clocks		: Contains an entry for each entry in clock-names.

  - clock-names		: Contains the following entries
	"mem"		  Peripheral access clock to access registers.
	"ipg"		  Peripheral clock to driver module.
	"asrck_<0-f>"	  Clock sources for input and output clock.

   - big-endian		: If this property is absent, the little endian mode
			  will be in use as default. Otherwise, the big endian
			  mode will be in use for all the device registers.

   - fsl,asrc-rate	: Defines a mutual sample rate used by DPCM Back Ends.

   - fsl,asrc-width	: Defines a mutual sample width used by DPCM Back Ends.

Example:

asrc: asrc@02034000 {
	compatible = "fsl,imx53-asrc";
	reg = <0x02034000 0x4000>;
	interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&clks 107>, <&clks 107>, <&clks 0>,
	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
	       <&clks 107>, <&clks 0>, <&clks 0>;
	clock-names = "mem", "ipg", "asrck0",
		"asrck_1", "asrck_2", "asrck_3", "asrck_4",
		"asrck_5", "asrck_6", "asrck_7", "asrck_8",
		"asrck_9", "asrck_a", "asrck_b", "asrck_c",
		"asrck_d", "asrck_e", "asrck_f";
	dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
	     <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
	dma-names = "rxa", "rxb", "rxc",
		"txa", "txb", "txc";
	fsl,asrc-rate  = <48000>;
	fsl,asrc-width = <16>;
	status = "okay";
};
+1 −1
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@@ -4,7 +4,7 @@ This device supports I2C only.

Required properties:

- compatible : "maxim,max98090".
- compatible : "maxim,max98090" or "maxim,max98091".

- reg : The I2C address of the device.

+9 −0
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@@ -13,6 +13,9 @@ Required properties:
- rcar_sound,src		: Should contain SRC feature.
				  The number of SRC subnode should be same as HW.
				  see below for detail.
- rcar_sound,dvc		: Should contain DVC feature.
				  The number of DVC subnode should be same as HW.
				  see below for detail.
- rcar_sound,dai		: DAI contents.
				  The number of DAI subnode should be same as HW.
				  see below for detail.
@@ -21,6 +24,7 @@ SSI subnode properties:
- interrupts			: Should contain SSI interrupt for PIO transfer
- shared-pin			: if shared clock pin
- pio-transfer			: use PIO transfer mode
- no-busif			: BUSIF is not ussed when [mem -> SSI] via DMA case

SRC subnode properties:
no properties at this point
@@ -39,6 +43,11 @@ rcar_sound: rcar_sound@0xffd90000 {
		<0 0xec540000 0 0x1000>, /* SSIU */
		<0 0xec541000 0 0x1280>; /* SSI */

	rcar_sound,dvc {
		dvc0: dvc@0 { };
		dvc1: dvc@1 { };
	};

	rcar_sound,src {
		src0: src@0 { };
		src1: src@1 { };
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