Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm

 to external devices using the OF graph reprensentation (see ../graph.txt).

 At least one port node is required.

Optional properties in grandchild nodes:

 Any endpoint grandchild node may specify a desired video interface

 according to ../../media/video-interfaces.txt, specifically

 - bus-width: recognized values are <12>, <16>, <18> and <24>, and

   override any output mode selection heuristic, forcing "rgb444",

   "rgb565", "rgb666" and "rgb888" respectively.

Example:

	hlcdc: hlcdc@f0030000 {

			#pwm-cells = <3>;

		};

	};

Example 2: With a video interface override to force rgb565; as above

but with these changes/additions:

	&hlcdc {

		hlcdc-display-controller {

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;

			port@0 {

				hlcdc_panel_output: endpoint@0 {

					bus-width = <16>;

				};

			};

		};

	};

Required properties:

- compatible: Must be "lvds-encoder"

- compatible: Must be one or more of the following

  - "ti,ds90c185" for the TI DS90C185 FPD-Link Serializer

  - "lvds-encoder" for a generic LVDS encoder device

  When compatible with the generic version, nodes must list the

  device-specific version corresponding to the device first

  followed by the generic version.

Required nodes:

  - "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders

  - "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders

  - "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders

  - "renesas,r8a77980-lvds" for R8A77980 (R-Car V3H) compatible LVDS encoders

  - "renesas,r8a77990-lvds" for R8A77990 (R-Car E3) compatible LVDS encoders

  - "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders

- reg: Base address and length for the memory-mapped registers

- clocks: A phandle + clock-specifier pair for the functional clock

- clocks: A list of phandles + clock-specifier pairs, one for each entry in

  the clock-names property.

- clock-names: Name of the clocks. This property is model-dependent.

  - The functional clock, which mandatory for all models, shall be listed

    first, and shall be named "fck".

  - On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or

    DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be

    named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN

    numerical index.

  - When the clocks property only contains the functional clock, the

    clock-names property may be omitted.

- resets: A phandle + reset specifier for the module reset

Required nodes:

SN65DSI86 DSI to eDP bridge chip

--------------------------------

This is the binding for Texas Instruments SN65DSI86 bridge.

http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf

Required properties:

- compatible: Must be "ti,sn65dsi86"

- reg: i2c address of the chip, 0x2d as per datasheet

- enable-gpios: gpio specification for bridge_en pin (active high)

- vccio-supply: A 1.8V supply that powers up the digital IOs.

- vpll-supply: A 1.8V supply that powers up the displayport PLL.

- vcca-supply: A 1.2V supply that powers up the analog circuits.

- vcc-supply: A 1.2V supply that powers up the digital core.

Optional properties:

- interrupts-extended: Specifier for the SN65DSI86 interrupt line.

- gpio-controller: Marks the device has a GPIO controller.

- #gpio-cells    : Should be two. The first cell is the pin number and

                   the second cell is used to specify flags.

                   See ../../gpio/gpio.txt for more information.

- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of

               the cell formats.

- clock-names: should be "refclk"

- clocks: Specification for input reference clock. The reference

	  clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.

- data-lanes: See ../../media/video-interface.txt

- lane-polarities: See ../../media/video-interface.txt

- suspend-gpios: specification for GPIO1 pin on bridge (active low)

Required nodes:

This device has two video ports. Their connections are modelled using the

OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.

- Video port 0 for DSI input

- Video port 1 for eDP output

Example

-------

edp-bridge@2d {

	compatible = "ti,sn65dsi86";

	#address-cells = <1>;

	#size-cells = <0>;

	reg = <0x2d>;

	enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;

	suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;

	interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;

	vccio-supply = <&pm8916_l17>;

	vcca-supply = <&pm8916_l6>;

	vpll-supply = <&pm8916_l17>;

	vcc-supply = <&pm8916_l6>;

	clock-names = "refclk";

	clocks = <&input_refclk>;

	ports {

		#address-cells = <1>;

		#size-cells = <0>;

		port@0 {

			reg = <0>;

			edp_bridge_in: endpoint {

				remote-endpoint = <&dsi_out>;

			};

		};

		port@1 {

			reg = <1>;

			edp_bridge_out: endpoint {

				data-lanes = <2 1 3 0>;

				lane-polarities = <0 1 0 1>;

				remote-endpoint = <&edp_panel_in>;

			};

		};

	};

}

TC358764 MIPI-DSI to LVDS panel bridge

Required properties:

  - compatible: "toshiba,tc358764"

  - reg: the virtual channel number of a DSI peripheral

  - vddc-supply: core voltage supply, 1.2V

  - vddio-supply: I/O voltage supply, 1.8V or 3.3V

  - vddlvds-supply: LVDS1/2 voltage supply, 3.3V

  - reset-gpios: a GPIO spec for the reset pin

The device node can contain following 'port' child nodes,

according to the OF graph bindings defined in [1]:

  0: DSI Input, not required, if the bridge is DSI controlled

  1: LVDS Output, mandatory

[1]: Documentation/devicetree/bindings/media/video-interfaces.txt

Example:

	bridge@0 {

		reg = <0>;

		compatible = "toshiba,tc358764";

		vddc-supply = <&vcc_1v2_reg>;

		vddio-supply = <&vcc_1v8_reg>;

		vddlvds-supply = <&vcc_3v3_reg>;

		reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;

		#address-cells = <1>;

		#size-cells = <0>;

		port@1 {

			reg = <1>;

			lvds_ep: endpoint {

				remote-endpoint = <&panel_ep>;

			};

		};

	};