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Commit 53aa7777 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Cleanup the adreno SOC HW probe 



The code to probe the sometimes used HW revision only needs to live in
adreno.c and we don't need to store a persistent member in adreno_device.
Localize all the code and pass the HW revision into the functions that
need it.

Change-Id: Ic0dedbaddafe258f6b6510f68867cff636963315
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 565c3706

drivers/gpu/msm/adreno.c

+31 −26
Original line number Diff line number Diff line
@@ -653,37 +653,42 @@ static struct { 
};



static struct device_node *

adreno_get_soc_hw_revision_node(struct adreno_device *adreno_dev,

	struct platform_device *pdev)

adreno_get_soc_hw_revision_node(struct platform_device *pdev, u32 hwrev)

{

	struct device_node *node, *child;

	unsigned int rev;



	node = of_find_node_by_name(pdev->dev.of_node, "qcom,soc-hw-revisions");

	if (node == NULL)

		return NULL;



	for_each_child_of_node(node, child) {

		u32 rev;



		if (of_property_read_u32(child, "qcom,soc-hw-revision", &rev))

			continue;



		if (rev == adreno_dev->soc_hw_rev)

		if (rev == hwrev) {

			of_node_put(node);

			return child;

		}

	}



	of_node_put(node);



	dev_warn(&pdev->dev, "No matching SOC HW revision found for efused HW rev=%u\n",

		hwrev);



	dev_warn(KGSL_DEVICE(adreno_dev)->dev,

		      "No matching SOC HW revision found for efused HW rev=%u\n",

		      adreno_dev->soc_hw_rev);

	return NULL;

}



static void adreno_update_soc_hw_revision_quirks(

		struct adreno_device *adreno_dev, struct platform_device *pdev)

static void

adreno_update_soc_hw_revision_quirks(struct adreno_device *adreno_dev,

		struct platform_device *pdev, u32 hwrev)

{

	struct device_node *node;

	int i;



	node = adreno_get_soc_hw_revision_node(adreno_dev, pdev);

	node = adreno_get_soc_hw_revision_node(pdev, hwrev);

	if (node == NULL)

		node = pdev->dev.of_node;
@@ -691,8 +696,7 @@ static void adreno_update_soc_hw_revision_quirks( 
	if (of_property_read_u32(node, "qcom,chipid", &adreno_dev->chipid)) {

		if (of_property_read_u32(pdev->dev.of_node,

				"qcom,chipid", &adreno_dev->chipid)) {

			dev_crit(KGSL_DEVICE(adreno_dev)->dev,

				"No GPU chip ID was specified\n");

			dev_crit(&pdev->dev, "No GPU chip ID was specified\n");

			BUG();

			return;

		}
@@ -709,6 +713,9 @@ static void adreno_update_soc_hw_revision_quirks( 
		kgsl_mmu_set_feature(KGSL_DEVICE(adreno_dev),

			KGSL_MMU_SECURE_CB_ALT);





	if (node != pdev->dev.of_node)

		of_node_put(node);

}



static int adreno_identify_gpu(struct adreno_device *adreno_dev)
@@ -1156,35 +1163,33 @@ static void adreno_isense_probe(struct kgsl_device *device) 
		dev_warn(device->dev, "isense ioremap failed\n");

}



static void adreno_efuse_read_soc_hw_rev(struct adreno_device *adreno_dev)

static u32 adreno_efuse_read_soc_hw_rev(struct platform_device *pdev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int val;

	unsigned int soc_hw_rev[3];

	int ret;



	if (of_property_read_u32_array(

		device->pdev->dev.of_node,

	if (of_property_read_u32_array(pdev->dev.of_node,

		"qcom,soc-hw-rev-efuse", soc_hw_rev, 3))

		return;

		return 0;



	ret = adreno_efuse_map(device->pdev);

	ret = adreno_efuse_map(pdev);

	if (ret) {

		dev_err(device->dev,

		dev_err(&pdev->dev,

			"Unable to map hardware revision fuse: ret=%d\n", ret);

		return;

		return 0;

	}



	ret = adreno_efuse_read_u32(soc_hw_rev[0], &val);

	adreno_efuse_unmap();



	if (ret) {

		dev_err(device->dev,

		dev_err(&pdev->dev,

			"Unable to read hardware revision fuse: ret=%d\n", ret);

		return;

		return 0;

	}



	adreno_dev->soc_hw_rev = (val >> soc_hw_rev[1]) & soc_hw_rev[2];

	return (val >> soc_hw_rev[1]) & soc_hw_rev[2];

}



static bool adreno_is_gpu_disabled(struct adreno_device *adreno_dev)
@@ -1332,7 +1337,7 @@ static int adreno_bind(struct device *dev) 
	struct kgsl_device *device;

	int status;

	unsigned int priv = 0;

	u32 size;

	u32 size, hwrev;



	of_id = of_match_device(adreno_match_table, &pdev->dev);

	if (!of_id)
@@ -1355,9 +1360,9 @@ static int adreno_bind(struct device *dev) 
	}



	/* Identify SOC hardware revision to be used */

	adreno_efuse_read_soc_hw_rev(adreno_dev);

	hwrev = adreno_efuse_read_soc_hw_rev(pdev);



	adreno_update_soc_hw_revision_quirks(adreno_dev, pdev);

	adreno_update_soc_hw_revision_quirks(adreno_dev, pdev, hwrev);



	status = adreno_read_speed_bin(pdev);

	if (status < 0)

drivers/gpu/msm/adreno.h

+0 −2
Original line number Diff line number Diff line
@@ -427,7 +427,6 @@ struct adreno_gpu_core { 
 * @gpuhtw_llc_slice: GPU pagetables system cache slice descriptor

 * @gpuhtw_llc_slice_enable: To enable the GPUHTW system cache slice or not

 * @zap_loaded: Used to track if zap was successfully loaded or not

 * @soc_hw_rev: Indicate which SOC hardware revision to use

 */

struct adreno_device {

	struct kgsl_device dev;    /* Must be first field in this struct */
@@ -513,7 +512,6 @@ struct adreno_device { 
	void *gpuhtw_llc_slice;

	bool gpuhtw_llc_slice_enable;

	unsigned int zap_loaded;

	unsigned int soc_hw_rev;

	/**

	 * @critpkts: Memory descriptor for 5xx critical packets if applicable

	 */