Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 53809828 authored by Christian Lamparter's avatar Christian Lamparter Committed by Vinod Koul
Browse files

dt-bindings: dmaengine: dw-dmac: add protection control property



This patch for the DesignWare AHB Central
Direct Memory Access Controller adds the dma
protection control property:
	"snps,dma-protection-control"

as well as the properties specific values defines into
a new include file: include/dt-bindings/dma/dw-dmac.h

Note: The protection control signals are one-to-one
mapped to the AHB HPROT[1:3] signals for this controller.
The HPROT0 (Data Access) is always hardwired to 1.

Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarChristian Lamparter <chunkeey@gmail.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 65102238
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -27,6 +27,10 @@ Optional properties:
  general purpose DMA channel allocator. False if not passed.
- multi-block: Multi block transfers supported by hardware. Array property with
  one cell per channel. 0: not supported, 1 (default): supported.
- snps,dma-protection-control: AHB HPROT[3:1] protection setting.
  The default value is 0 (for non-cacheable, non-buffered,
  unprivileged data access).
  Refer to include/dt-bindings/dma/dw-dmac.h for possible values.

Example:

+3 −1
Original line number Diff line number Diff line
@@ -14363,9 +14363,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER
M:	Viresh Kumar <vireshk@kernel.org>
R:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
S:	Maintained
F:	Documentation/devicetree/bindings/dma/snps-dma.txt
F:	drivers/dma/dw/
F:	include/dt-bindings/dma/dw-dmac.h
F:	include/linux/dma/dw.h
F:	include/linux/platform_data/dma-dw.h
F:	drivers/dma/dw/

SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER
M:	Jose Abreu <Jose.Abreu@synopsys.com>
+14 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */

#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
#define __DT_BINDINGS_DMA_DW_DMAC_H__

/*
 * Protection Control bits provide protection against illegal transactions.
 * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
 */
#define DW_DMAC_HPROT1_PRIVILEGED_MODE	(1 << 0)	/* Privileged Mode */
#define DW_DMAC_HPROT2_BUFFERABLE	(1 << 1)	/* DMA is bufferable */
#define DW_DMAC_HPROT3_CACHEABLE	(1 << 2)	/* DMA is cacheable */

#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */