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Commit 535450b1 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add configuration for vref regulator vote for SHIMA"

parents f465441f 5e679a8b
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+154 −0
Original line number Diff line number Diff line
@@ -64,6 +64,44 @@
						"msm_skin_therm";
		};
	};

	mx_sdpm@0x00636000 {
		compatible = "qcom,sdpm";
		reg = <0x00636000 0x1000>;
		clock-names = "cam_cc_ipe", "video_cc_mvs0";
		clocks = <&camcc CAM_CC_IPE_0_CLK_SRC>,
			<&videocc VIDEO_CC_MVS0_CLK_SRC>;
		cam_cc_ipe-supply = <&cam_cc_ipe_0_gdsc>;
		video_cc_mvs0-supply = <&video_cc_mvs0_gdsc>;
		csr-id = <1 3>;
	};

	cx_sdpm@0x00634000 {
		compatible = "qcom,sdpm";
		reg = <0x00634000 0x1000>;
		clock-names = "cam_cc_csi0phytiimer", "video_cc_mvs0", "disp_cc_mdss_mdp";
		clocks = <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
			<&videocc VIDEO_CC_MVS0_CLK_SRC>,
			<&dispcc DISP_CC_MDSS_MDP_CLK_SRC>;
		cam_cc_csi0phytiimer-supply = <&cam_cc_titan_top_gdsc>;
		video_cc_mvs0-supply = <&video_cc_mvs0_gdsc>;
		disp_cc_mdss-mdp-supply = <&disp_cc_mdss_core_gdsc>;
		csr-id = <0 2 5>;
	};

	mx_pe: mx_rdpm_pe@0x00637000 {
		compatible = "qcom,policy-engine";
		#thermal-sensor-cells = <0>;
		reg = <0x00637000 0x1000>;
		interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
	};

	cx_pe: cx_rdpm_pe@0x00635000 {
		compatible = "qcom,policy-engine";
		#thermal-sensor-cells = <0>;
		reg = <0x00635000 0x1000>;
		interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
	};
};

&cpufreq_hw {
@@ -153,6 +191,14 @@
		};
	};

	qcom,limits-dcvs {
		compatible = "qcom,msm-hw-limits";
		isens_vref_0p8-supply = <&pm8350c_l10_ao>;
		isens-vref-0p8-settings = <880000 880000 30000>;
		isens_vref_1p8-supply = <&pm8350c_l1_ao>;
		isens-vref-1p8-settings = <1800000 1800000 20000>;
	};

	qcom,cpu-voltage-cdev {
		compatible = "qcom,cc-cooling-devices";
		apc1_cluster: qcom,apc1-cluster {
@@ -1366,4 +1412,112 @@
			};
		};
	};

	mx-pe-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&mx_pe>;
		thermal-governor = "step_wise";
		trips {
			mx_pe_config1: mx-pe-config1 {
				temperature = <1>;
				hysteresis = <1>;
				type = "passive";
			};

			mx_pe_config2: mx-pe-config2 {
				temperature = <2>;
				hysteresis = <1>;
				type = "passive";
			};

			mx_pe_config3: mx-pe-config3 {
				temperature = <3>;
				hysteresis = <1>;
				type = "passive";
			};
		};

		cooling-maps {
			mx_pe_cdev_1 {
				trip = <&mx_pe_config1>;
				cooling-device = <&cdsp_sw 0 0>;
			};

			mx_pe_cdev_2 {
				trip = <&mx_pe_config2>;
				cooling-device = <&msm_gpu 0 0>;
			};

			mx_pe_cdev_3 {
				trip = <&mx_pe_config3>;
				cooling-device = <&modem_tj 0 0>;
			};
		};
	};

	cx-pe-step {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-sensors = <&cx_pe>;
		thermal-governor = "step_wise";
		trips {
			cx_pe_config1: cx-pe-config1 {
				temperature = <1>;
				hysteresis = <1>;
				type = "passive";
			};

			cx_pe_config2: cx-pe-config2 {
				temperature = <2>;
				hysteresis = <1>;
				type = "passive";
			};

			cx_pe_config3: cx-pe-config3 {
				temperature = <3>;
				hysteresis = <1>;
				type = "passive";
			};

			cx_pe_config4: cx-pe-config4 {
				temperature = <4>;
				hysteresis = <1>;
				type = "passive";
			};

			cx_pe_config5: cx-pe-config5 {
				temperature = <5>;
				hysteresis = <2>;
				type = "passive";
			};
		};

		cooling-maps {
			cx_pe_cdev_1 {
				trip = <&cx_pe_config1>;
				cooling-device = <&cdsp_sw 0 0>;
			};

			cx_pe_cdev_2 {
				trip = <&cx_pe_config2>;
				cooling-device = <&cdsp_sw 0 0>;
			};

			cx_pe_cdev_3 {
				trip = <&cx_pe_config3>;
				cooling-device = <&cdsp_sw 0 0>;
			};

			cx_pe_cdev_4 {
				trip = <&cx_pe_config4>;
				cooling-device = <&modem_tj 0 0>;
			};

			cx_pe_cdev_5 {
				trip = <&cx_pe_config5>;
				cooling-device = <&cdsp_sw 0 0>;
			};
		};
	};
};