Loading drivers/iommu/arm-smmu.c +8 −26 Original line number Diff line number Diff line Loading @@ -3526,11 +3526,6 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, smmu_domain->attributes); ret = 0; break; case DOMAIN_ATTR_DEBUG: *((int *)data) = test_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); ret = 0; break; default: ret = -ENODEV; break; Loading Loading @@ -3765,16 +3760,6 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, } break; } case DOMAIN_ATTR_DEBUG: { int is_debug_domain = *((int *)data); if (is_debug_domain) set_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); else clear_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); ret = 0; break; } default: ret = -ENODEV; } Loading Loading @@ -4963,22 +4948,21 @@ static struct platform_driver arm_smmu_driver = { static struct platform_driver qsmmuv500_tbu_driver; static int __init arm_smmu_init(void) { static bool registered; int ret = 0; int ret; ktime_t cur; if (registered) return 0; cur = ktime_get(); ret = platform_driver_register(&qsmmuv500_tbu_driver); if (ret) return ret; ret = platform_driver_register(&arm_smmu_driver); registered = !ret; trace_smmu_init(ktime_us_delta(ktime_get(), cur)); if (ret) { platform_driver_unregister(&qsmmuv500_tbu_driver); return ret; } trace_smmu_init(ktime_us_delta(ktime_get(), cur)); return ret; } Loading Loading @@ -5596,19 +5580,17 @@ static phys_addr_t qsmmuv500_iova_to_phys_hard( { u16 sid; struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct msm_iommu_domain *msm_domain = to_msm_iommu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; struct iommu_fwspec *fwspec; u32 frsynra; int is_debug_domain; arm_smmu_domain_get_attr(domain, DOMAIN_ATTR_DEBUG, &is_debug_domain); /* Check to see if the domain is associated with the test * device. If the domain belongs to the test device, then * pick the SID from fwspec. */ if (is_debug_domain) { if (msm_domain->is_debug_domain) { fwspec = dev_iommu_fwspec_get(smmu_domain->dev); sid = (u16)fwspec->ids[0]; } else { Loading drivers/iommu/iommu-debug.c +4 −2 Original line number Diff line number Diff line Loading @@ -209,8 +209,6 @@ static int iommu_debug_set_attrs(struct iommu_debug_device *ddev, iommu_domain_set_attr(domain, DOMAIN_ATTR_SECURE_VMID, &attrs->vmid); iommu_domain_set_attr(domain, DOMAIN_ATTR_DEBUG, &val); return 0; } Loading @@ -237,6 +235,7 @@ static int iommu_debug_dma_reconfigure(struct iommu_debug_device *ddev, const struct iommu_ops *iommu; struct iommu_domain *domain; struct msm_iommu_domain *msm_domain; struct device *dev = ddev->dev; int is_fast; bool coherent; Loading Loading @@ -276,6 +275,9 @@ static int iommu_debug_dma_reconfigure(struct iommu_debug_device *ddev, return -EINVAL; } msm_domain = to_msm_iommu_domain(domain); msm_domain->is_debug_domain = true; if (iommu_debug_set_attrs(ddev, domain, attrs)) { dev_err_ratelimited(dev, "Setting attrs failed\n"); goto out_free_domain; Loading include/linux/iommu.h +2 −2 Original line number Diff line number Diff line Loading @@ -117,6 +117,7 @@ struct iommu_domain { struct msm_iommu_domain { char name[IOMMU_DOMAIN_NAME_LEN]; bool is_debug_domain; struct iommu_domain iommu_domain; }; Loading Loading @@ -178,8 +179,7 @@ enum iommu_attr { #define DOMAIN_ATTR_CB_STALL_DISABLE (EXTENDED_ATTR_BASE + 16) #define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 17) #define DOMAIN_ATTR_NO_CFRE (EXTENDED_ATTR_BASE + 18) #define DOMAIN_ATTR_DEBUG (EXTENDED_ATTR_BASE + 19) #define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 20) #define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 19) /* These are the possible reserved region types */ enum iommu_resv_type { Loading Loading
drivers/iommu/arm-smmu.c +8 −26 Original line number Diff line number Diff line Loading @@ -3526,11 +3526,6 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, smmu_domain->attributes); ret = 0; break; case DOMAIN_ATTR_DEBUG: *((int *)data) = test_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); ret = 0; break; default: ret = -ENODEV; break; Loading Loading @@ -3765,16 +3760,6 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, } break; } case DOMAIN_ATTR_DEBUG: { int is_debug_domain = *((int *)data); if (is_debug_domain) set_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); else clear_bit(DOMAIN_ATTR_DEBUG, smmu_domain->attributes); ret = 0; break; } default: ret = -ENODEV; } Loading Loading @@ -4963,22 +4948,21 @@ static struct platform_driver arm_smmu_driver = { static struct platform_driver qsmmuv500_tbu_driver; static int __init arm_smmu_init(void) { static bool registered; int ret = 0; int ret; ktime_t cur; if (registered) return 0; cur = ktime_get(); ret = platform_driver_register(&qsmmuv500_tbu_driver); if (ret) return ret; ret = platform_driver_register(&arm_smmu_driver); registered = !ret; trace_smmu_init(ktime_us_delta(ktime_get(), cur)); if (ret) { platform_driver_unregister(&qsmmuv500_tbu_driver); return ret; } trace_smmu_init(ktime_us_delta(ktime_get(), cur)); return ret; } Loading Loading @@ -5596,19 +5580,17 @@ static phys_addr_t qsmmuv500_iova_to_phys_hard( { u16 sid; struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct msm_iommu_domain *msm_domain = to_msm_iommu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; struct iommu_fwspec *fwspec; u32 frsynra; int is_debug_domain; arm_smmu_domain_get_attr(domain, DOMAIN_ATTR_DEBUG, &is_debug_domain); /* Check to see if the domain is associated with the test * device. If the domain belongs to the test device, then * pick the SID from fwspec. */ if (is_debug_domain) { if (msm_domain->is_debug_domain) { fwspec = dev_iommu_fwspec_get(smmu_domain->dev); sid = (u16)fwspec->ids[0]; } else { Loading
drivers/iommu/iommu-debug.c +4 −2 Original line number Diff line number Diff line Loading @@ -209,8 +209,6 @@ static int iommu_debug_set_attrs(struct iommu_debug_device *ddev, iommu_domain_set_attr(domain, DOMAIN_ATTR_SECURE_VMID, &attrs->vmid); iommu_domain_set_attr(domain, DOMAIN_ATTR_DEBUG, &val); return 0; } Loading @@ -237,6 +235,7 @@ static int iommu_debug_dma_reconfigure(struct iommu_debug_device *ddev, const struct iommu_ops *iommu; struct iommu_domain *domain; struct msm_iommu_domain *msm_domain; struct device *dev = ddev->dev; int is_fast; bool coherent; Loading Loading @@ -276,6 +275,9 @@ static int iommu_debug_dma_reconfigure(struct iommu_debug_device *ddev, return -EINVAL; } msm_domain = to_msm_iommu_domain(domain); msm_domain->is_debug_domain = true; if (iommu_debug_set_attrs(ddev, domain, attrs)) { dev_err_ratelimited(dev, "Setting attrs failed\n"); goto out_free_domain; Loading
include/linux/iommu.h +2 −2 Original line number Diff line number Diff line Loading @@ -117,6 +117,7 @@ struct iommu_domain { struct msm_iommu_domain { char name[IOMMU_DOMAIN_NAME_LEN]; bool is_debug_domain; struct iommu_domain iommu_domain; }; Loading Loading @@ -178,8 +179,7 @@ enum iommu_attr { #define DOMAIN_ATTR_CB_STALL_DISABLE (EXTENDED_ATTR_BASE + 16) #define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 17) #define DOMAIN_ATTR_NO_CFRE (EXTENDED_ATTR_BASE + 18) #define DOMAIN_ATTR_DEBUG (EXTENDED_ATTR_BASE + 19) #define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 20) #define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 19) /* These are the possible reserved region types */ enum iommu_resv_type { Loading