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Commit 531ccabb authored by Alexander Stein's avatar Alexander Stein Committed by Wolfram Sang
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i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield 



Both Merrifield TRM and Medfield TRM state:
"Both 7-bit and 10-bit addressing modes are supported."

Signed-off-by: default avatarAlexander Stein <alexander.stein@systec-electronic.com>
Acked-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 294be03c

drivers/i2c/busses/i2c-designware-pcidrv.c

+2 −0
Original line number Diff line number Diff line
@@ -141,6 +141,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { 
		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,

		.tx_fifo_depth = 32,

		.rx_fifo_depth = 32,

		.functionality = I2C_FUNC_10BIT_ADDR,

		.clk_khz      = 25000,

		.setup = mfld_setup,

	},
@@ -149,6 +150,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { 
		.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,

		.tx_fifo_depth = 64,

		.rx_fifo_depth = 64,

		.functionality = I2C_FUNC_10BIT_ADDR,

		.scl_sda_cfg = &mrfld_config,

		.setup = mrfld_setup,

	},