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Commit 52eafc68 authored by Or Gerlitz's avatar Or Gerlitz Committed by Roland Dreier
Browse files

mlx4_core: Extend capability flags to 64 bits 



The latest firmware adds a second dword containing more device flags,
so extend the device capabilities flags field from 32 to 64 bits.
Derived from patch by Eli Cohen <eli@mellanox.co.il>

Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.co.il>
Signed-off-by: default avatarRoland Dreier <roland@purestorage.com>
parent 6451c712

drivers/net/mlx4/fw.c

+5 −4
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ MODULE_PARM_DESC(enable_qos, "Enable Quality of Service support in the HCA (defa 
		}						      \

	} while (0)



static void dump_dev_cap_flags(struct mlx4_dev *dev, u32 flags)

static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags)

{

	static const char *fname[] = {

		[ 0] = "RC transport",
@@ -105,7 +105,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u32 flags) 


	mlx4_dbg(dev, "DEV_CAP flags:\n");

	for (i = 0; i < ARRAY_SIZE(fname); ++i)

		if (fname[i] && (flags & (1 << i)))

		if (fname[i] && (flags & (1LL << i)))

			mlx4_dbg(dev, "    %s\n", fname[i]);

}
@@ -142,7 +142,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) 
	struct mlx4_cmd_mailbox *mailbox;

	u32 *outbox;

	u8 field;

	u32 field32;

	u32 field32, flags;

	u16 size;

	u16 stat_rate;

	int err;
@@ -279,7 +279,8 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) 
	MLX4_GET(field, outbox, QUERY_DEV_CAP_ETH_UC_LOOPBACK_OFFSET);

	dev_cap->loopback_support = field & 0x1;

	dev_cap->wol = field & 0x40;

	MLX4_GET(dev_cap->flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);

	MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);

	dev_cap->flags = flags;

	MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET);

	dev_cap->reserved_uars = field >> 4;

	MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET);

drivers/net/mlx4/fw.h

+1 −1
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ struct mlx4_dev_cap { 
	int vep_uc_steering;

	int vep_mc_steering;

	int wol;

	u32 flags;

	u64 flags;

	int reserved_uars;

	int uar_size;

	int min_page_sz;

include/linux/mlx4/device.h

+17 −17
Original line number Diff line number Diff line
@@ -58,22 +58,22 @@ enum { 
};



enum {

	MLX4_DEV_CAP_FLAG_RC		= 1 <<  0,

	MLX4_DEV_CAP_FLAG_UC		= 1 <<  1,

	MLX4_DEV_CAP_FLAG_UD		= 1 <<  2,

	MLX4_DEV_CAP_FLAG_SRQ		= 1 <<  6,

	MLX4_DEV_CAP_FLAG_IPOIB_CSUM	= 1 <<  7,

	MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR	= 1 <<  8,

	MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR	= 1 <<  9,

	MLX4_DEV_CAP_FLAG_DPDP		= 1 << 12,

	MLX4_DEV_CAP_FLAG_BLH		= 1 << 15,

	MLX4_DEV_CAP_FLAG_MEM_WINDOW	= 1 << 16,

	MLX4_DEV_CAP_FLAG_APM		= 1 << 17,

	MLX4_DEV_CAP_FLAG_ATOMIC	= 1 << 18,

	MLX4_DEV_CAP_FLAG_RAW_MCAST	= 1 << 19,

	MLX4_DEV_CAP_FLAG_UD_AV_PORT	= 1 << 20,

	MLX4_DEV_CAP_FLAG_UD_MCAST	= 1 << 21,

	MLX4_DEV_CAP_FLAG_IBOE		= 1 << 30

	MLX4_DEV_CAP_FLAG_RC		= 1LL <<  0,

	MLX4_DEV_CAP_FLAG_UC		= 1LL <<  1,

	MLX4_DEV_CAP_FLAG_UD		= 1LL <<  2,

	MLX4_DEV_CAP_FLAG_SRQ		= 1LL <<  6,

	MLX4_DEV_CAP_FLAG_IPOIB_CSUM	= 1LL <<  7,

	MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR	= 1LL <<  8,

	MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR	= 1LL <<  9,

	MLX4_DEV_CAP_FLAG_DPDP		= 1LL << 12,

	MLX4_DEV_CAP_FLAG_BLH		= 1LL << 15,

	MLX4_DEV_CAP_FLAG_MEM_WINDOW	= 1LL << 16,

	MLX4_DEV_CAP_FLAG_APM		= 1LL << 17,

	MLX4_DEV_CAP_FLAG_ATOMIC	= 1LL << 18,

	MLX4_DEV_CAP_FLAG_RAW_MCAST	= 1LL << 19,

	MLX4_DEV_CAP_FLAG_UD_AV_PORT	= 1LL << 20,

	MLX4_DEV_CAP_FLAG_UD_MCAST	= 1LL << 21,

	MLX4_DEV_CAP_FLAG_IBOE		= 1LL << 30

};



enum {
@@ -253,7 +253,7 @@ struct mlx4_caps { 
	int			mtt_entry_sz;

	u32			max_msg_sz;

	u32			page_size_cap;

	u32			flags;

	u64			flags;

	u32			bmme_flags;

	u32			reserved_lkey;

	u16			stat_rate_support;