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Commit 52911e03 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Remove meanless return value check in RV 



In send_message_to_smu helper functions,
Print out the error code for debug if smu failed to response.

The helper functions always return true, so no need to
check their return value.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7f8e66b6

drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c

+20 −52
Original line number Original line Diff line number Diff line
@@ -243,8 +243,7 @@ static int rv_disable_gfx_off(struct pp_hwmgr *hwmgr) 
	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);

	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);





	if (rv_data->gfx_off_controled_by_driver)

	if (rv_data->gfx_off_controled_by_driver)

		smum_send_msg_to_smc(hwmgr,

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableGfxOff);

						PPSMC_MSG_DisableGfxOff);





	return 0;

	return 0;

}

}
@@ -259,8 +258,7 @@ static int rv_enable_gfx_off(struct pp_hwmgr *hwmgr) 
	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);

	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);





	if (rv_data->gfx_off_controled_by_driver)

	if (rv_data->gfx_off_controled_by_driver)

		smum_send_msg_to_smc(hwmgr,

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableGfxOff);

						PPSMC_MSG_EnableGfxOff);





	return 0;

	return 0;

}

}
@@ -387,24 +385,12 @@ static int rv_populate_clock_table(struct pp_hwmgr *hwmgr) 
	rv_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_phyclk,

	rv_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_phyclk,

					ARRAY_SIZE(VddPhyClk), &VddPhyClk[0]);

					ARRAY_SIZE(VddPhyClk), &VddPhyClk[0]);





	PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,

	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency);

			PPSMC_MSG_GetMinGfxclkFrequency),

	rv_read_arg_from_smc(hwmgr, &result);

			"Attempt to get min GFXCLK Failed!",

			return -1);

	PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,

			&result),

			"Attempt to get min GFXCLK Failed!",

			return -1);

	rv_data->gfx_min_freq_limit = result * 100;

	rv_data->gfx_min_freq_limit = result * 100;





	PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,

	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency);

			PPSMC_MSG_GetMaxGfxclkFrequency),

	rv_read_arg_from_smc(hwmgr, &result);

			"Attempt to get max GFXCLK Failed!",

			return -1);

	PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,

			&result),

			"Attempt to get max GFXCLK Failed!",

			return -1);

	rv_data->gfx_max_freq_limit = result * 100;

	rv_data->gfx_max_freq_limit = result * 100;





	return 0;

	return 0;
@@ -739,14 +725,8 @@ static int rv_print_clock_levels(struct pp_hwmgr *hwmgr, 




	switch (type) {

	switch (type) {

	case PP_SCLK:

	case PP_SCLK:

		PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency);

				PPSMC_MSG_GetGfxclkFrequency),

		rv_read_arg_from_smc(hwmgr, &now);

				"Attempt to get current GFXCLK Failed!",

				return -1);

		PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,

				&now),

				"Attempt to get current GFXCLK Failed!",

				return -1);





		size += sprintf(buf + size, "0: %uMhz %s\n",

		size += sprintf(buf + size, "0: %uMhz %s\n",

				data->gfx_min_freq_limit / 100,

				data->gfx_min_freq_limit / 100,
@@ -758,14 +738,8 @@ static int rv_print_clock_levels(struct pp_hwmgr *hwmgr, 
				 == now) ? "*" : "");

				 == now) ? "*" : "");

		break;

		break;

	case PP_MCLK:

	case PP_MCLK:

		PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency);

				PPSMC_MSG_GetFclkFrequency),

		rv_read_arg_from_smc(hwmgr, &now);

				"Attempt to get current MEMCLK Failed!",

				return -1);

		PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,

				&now),

				"Attempt to get current MEMCLK Failed!",

				return -1);





		for (i = 0; i < mclk_table->count; i++)

		for (i = 0; i < mclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sprintf(buf + size, "%d: %uMhz %s\n",
@@ -935,7 +909,6 @@ static int rv_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, 
int rv_display_clock_voltage_request(struct pp_hwmgr *hwmgr,

int rv_display_clock_voltage_request(struct pp_hwmgr *hwmgr,

		struct pp_display_clock_request *clock_req)

		struct pp_display_clock_request *clock_req)

{

{

	int result = 0;

	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);

	struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);

	enum amd_pp_clock_type clk_type = clock_req->clock_type;

	enum amd_pp_clock_type clk_type = clock_req->clock_type;

	uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;

	uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
@@ -962,10 +935,9 @@ int rv_display_clock_voltage_request(struct pp_hwmgr *hwmgr, 
		return -EINVAL;

		return -EINVAL;

	}

	}





	result = smum_send_msg_to_smc_with_parameter(hwmgr, msg,

	smum_send_msg_to_smc_with_parameter(hwmgr, msg, clk_freq);

							clk_freq);





	return result;

	return 0;

}

}





static int rv_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks)

static int rv_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks)
@@ -998,22 +970,18 @@ static int rv_read_sensor(struct pp_hwmgr *hwmgr, int idx, 




	switch (idx) {

	switch (idx) {

	case AMDGPU_PP_SENSOR_GFX_SCLK:

	case AMDGPU_PP_SENSOR_GFX_SCLK:

		ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency);

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency);

		if (!ret) {

		rv_read_arg_from_smc(hwmgr, &sclk);

		rv_read_arg_from_smc(hwmgr, &sclk);

			/* in units of 10KHZ */

			/* in units of 10KHZ */

		*((uint32_t *)value) = sclk * 100;

		*((uint32_t *)value) = sclk * 100;

		*size = 4;

		*size = 4;

		}

		break;

		break;

	case AMDGPU_PP_SENSOR_GFX_MCLK:

	case AMDGPU_PP_SENSOR_GFX_MCLK:

		ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency);

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency);

		if (!ret) {

		rv_read_arg_from_smc(hwmgr, &mclk);

		rv_read_arg_from_smc(hwmgr, &mclk);

			/* in units of 10KHZ */

			/* in units of 10KHZ */

		*((uint32_t *)value) = mclk * 100;

		*((uint32_t *)value) = mclk * 100;

		*size = 4;

		*size = 4;

		}

		break;

		break;

	case AMDGPU_PP_SENSOR_GPU_TEMP:

	case AMDGPU_PP_SENSOR_GPU_TEMP:

		*((uint32_t *)value) = rv_thermal_get_temperature(hwmgr);

		*((uint32_t *)value) = rv_thermal_get_temperature(hwmgr);

drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c

+33 −65
Original line number Original line Diff line number Diff line
@@ -139,20 +139,15 @@ int rv_copy_table_from_smc(struct pp_hwmgr *hwmgr, 
			"Invalid SMU Table version!", return -EINVAL;);

			"Invalid SMU Table version!", return -EINVAL;);

	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,

	PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,

			"Invalid SMU Table Length!", return -EINVAL;);

			"Invalid SMU Table Length!", return -EINVAL;);

	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

	rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));

			"[CopyTableFromSMC] Attempt to Set Dram Addr High Failed!", return -EINVAL;);

	rv_send_msg_to_smc_with_parameter(hwmgr,

	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrLow,

			PPSMC_MSG_SetDriverDramAddrLow,

			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,

			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));

			"[CopyTableFromSMC] Attempt to Set Dram Addr Low Failed!",

	rv_send_msg_to_smc_with_parameter(hwmgr,

			return -EINVAL;);

	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_TransferTableSmu2Dram,

			PPSMC_MSG_TransferTableSmu2Dram,

			priv->smu_tables.entry[table_id].table_id) == 0,

			priv->smu_tables.entry[table_id].table_id);

			"[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!",

			return -EINVAL;);





	memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,

	memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,

			priv->smu_tables.entry[table_id].size);

			priv->smu_tables.entry[table_id].size);
@@ -176,21 +171,15 @@ int rv_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
	memcpy(priv->smu_tables.entry[table_id].table, table,

	memcpy(priv->smu_tables.entry[table_id].table, table,

			priv->smu_tables.entry[table_id].size);

			priv->smu_tables.entry[table_id].size);





	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

	rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));

			"[CopyTableToSMC] Attempt to Set Dram Addr High Failed!",

	rv_send_msg_to_smc_with_parameter(hwmgr,

			return -EINVAL;);

	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrLow,

			PPSMC_MSG_SetDriverDramAddrLow,

			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,

			lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));

			"[CopyTableToSMC] Attempt to Set Dram Addr Low Failed!",

	rv_send_msg_to_smc_with_parameter(hwmgr,

			return -EINVAL;);

	PP_ASSERT_WITH_CODE(rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_TransferTableDram2Smu,

			PPSMC_MSG_TransferTableDram2Smu,

			priv->smu_tables.entry[table_id].table_id) == 0,

			priv->smu_tables.entry[table_id].table_id);

			"[CopyTableToSMC] Attempt to Transfer Table To SMU Failed!",

			return -EINVAL;);





	return 0;

	return 0;

}

}
@@ -199,61 +188,43 @@ static int rv_verify_smc_interface(struct pp_hwmgr *hwmgr) 
{

{

	uint32_t smc_driver_if_version;

	uint32_t smc_driver_if_version;





	PP_ASSERT_WITH_CODE(!rv_send_msg_to_smc(hwmgr,

	rv_send_msg_to_smc(hwmgr,

			PPSMC_MSG_GetDriverIfVersion),

			PPSMC_MSG_GetDriverIfVersion);

			"Attempt to get SMC IF Version Number Failed!",

	rv_read_arg_from_smc(hwmgr,

			return -EINVAL);

			&smc_driver_if_version);

	PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr,

			&smc_driver_if_version),

			"Attempt to read SMC IF Version Number Failed!",

			return -EINVAL);





	if (smc_driver_if_version != SMU10_DRIVER_IF_VERSION)

	if (smc_driver_if_version != SMU10_DRIVER_IF_VERSION) {

		pr_err("Attempt to read SMC IF Version Number Failed!\n");

		return -EINVAL;

		return -EINVAL;

	}





	return 0;

	return 0;

}

}





/* sdma is disabled by default in vbios, need to re-enable in driver */

/* sdma is disabled by default in vbios, need to re-enable in driver */

static int rv_smc_enable_sdma(struct pp_hwmgr *hwmgr)

static void rv_smc_enable_sdma(struct pp_hwmgr *hwmgr)

{

{

	PP_ASSERT_WITH_CODE(!rv_send_msg_to_smc(hwmgr,

	rv_send_msg_to_smc(hwmgr,

			PPSMC_MSG_PowerUpSdma),

			PPSMC_MSG_PowerUpSdma);

			"Attempt to power up sdma Failed!",

			return -EINVAL);



	return 0;

}

}





static int rv_smc_disable_sdma(struct pp_hwmgr *hwmgr)

static void rv_smc_disable_sdma(struct pp_hwmgr *hwmgr)

{

{

	PP_ASSERT_WITH_CODE(!rv_send_msg_to_smc(hwmgr,

	rv_send_msg_to_smc(hwmgr,

			PPSMC_MSG_PowerDownSdma),

			PPSMC_MSG_PowerDownSdma);

			"Attempt to power down sdma Failed!",

			return -EINVAL);



	return 0;

}

}





/* vcn is disabled by default in vbios, need to re-enable in driver */

/* vcn is disabled by default in vbios, need to re-enable in driver */

static int rv_smc_enable_vcn(struct pp_hwmgr *hwmgr)

static void rv_smc_enable_vcn(struct pp_hwmgr *hwmgr)

{

{

	PP_ASSERT_WITH_CODE(!rv_send_msg_to_smc_with_parameter(hwmgr,

	rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_PowerUpVcn, 0),

			PPSMC_MSG_PowerUpVcn, 0);

			"Attempt to power up vcn Failed!",

			return -EINVAL);



	return 0;

}

}





static int rv_smc_disable_vcn(struct pp_hwmgr *hwmgr)

static void rv_smc_disable_vcn(struct pp_hwmgr *hwmgr)

{

{

	PP_ASSERT_WITH_CODE(!rv_send_msg_to_smc_with_parameter(hwmgr,

	rv_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_PowerDownVcn, 0),

			PPSMC_MSG_PowerDownVcn, 0);

			"Attempt to power down vcn Failed!",

			return -EINVAL);



	return 0;

}

}





static int rv_smu_fini(struct pp_hwmgr *hwmgr)

static int rv_smu_fini(struct pp_hwmgr *hwmgr)
@@ -289,11 +260,8 @@ static int rv_start_smu(struct pp_hwmgr *hwmgr) 




	if (rv_verify_smc_interface(hwmgr))

	if (rv_verify_smc_interface(hwmgr))

		return -EINVAL;

		return -EINVAL;

	if (rv_smc_enable_sdma(hwmgr))

	rv_smc_enable_sdma(hwmgr);

		return -EINVAL;

	rv_smc_enable_vcn(hwmgr);

	if (rv_smc_enable_vcn(hwmgr))

		return -EINVAL;



	return 0;

	return 0;

}

}