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Commit 51bff274 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "usb: dwc3-msm: Add support for aggre_noc and sys_noc clocks"

parents 87f75696 0b4b41a3

arch/arm64/configs/vendor/direwolf_auto_GKI.config

+22 −0
Original line number Diff line number Diff line
@@ -44,3 +44,25 @@ CONFIG_ARM_SMMU=m 
CONFIG_PHY_QCOM_UFS=m

CONFIG_PHY_QCOM_UFS_V4=m

CONFIG_SCSI_UFS_QCOM=m

CONFIG_MSM_GENI_SE=m

CONFIG_SERIAL_MSM_GENI=m

CONFIG_I2C_MSM_GENI=m

CONFIG_SPI_MSM_GENI=m

CONFIG_USB_XHCI_HCD=m

CONFIG_USB_DWC3=m

CONFIG_USB_DWC3_MSM=m

CONFIG_USB_EHSET_TEST_FIXTURE=m

CONFIG_USB_LINK_LAYER_TEST=m

CONFIG_NOP_USB_XCEIV=m

CONFIG_USB_MSM_SSPHY_QMP=m

CONFIG_MSM_HSUSB_PHY=m

CONFIG_USB_CONFIGFS_F_DIAG=m

CONFIG_USB_CONFIGFS_F_QDSS=m

CONFIG_USB_CONFIGFS_F_CDEV=m

CONFIG_EXTCON_USB_GPIO=m

# CONFIG_USB_XHCI_DBGCAP is not set

# CONFIG_USB_XHCI_PCI_RENESAS is not set

# CONFIG_USB_XHCI_HISTB is not set

# CONFIG_USB_DWC3_HOST is not set

# CONFIG_USB_DWC3_GADGET is not set

# CONFIG_USB_QCOM_EMU_PHY is not set

arch/arm64/configs/vendor/direwolf_auto_QGKI.config

+5 −0
Original line number Diff line number Diff line
@@ -20,3 +20,8 @@ CONFIG_QCOM_LLCC_PMU=y 
CONFIG_SCSI_UFSHCD_QTI=y

CONFIG_SCSI_UFS_BSG=y

CONFIG_SCSI_UFSHCD=y

CONFIG_USB_ANNOUNCE_NEW_DEVICES=y

CONFIG_USB_MON=y

CONFIG_USB_ACM=y

# CONFIG_USB_PULSE8_CEC is not set

# CONFIG_USB_RAINSHADOW_CEC is not set

arch/arm64/configs/vendor/direwolf_auto_debug.config

+4 −0
Original line number Diff line number Diff line 
CONFIG_LOCALVERSION="-qgki-debug"

CONFIG_IOMMU_DEBUG=y

CONFIG_IOMMU_TESTS=y

CONFIG_SERIAL_MSM_GENI_HALF_SAMPLING=y

CONFIG_I2C_CHARDEV=y

CONFIG_SPI_SPIDEV=y

CONFIG_SERIAL_MSM_GENI_CONSOLE=y

drivers/usb/dwc3/dwc3-msm.c

+26 −0
Original line number Diff line number Diff line
@@ -443,6 +443,9 @@ struct dwc3_msm { 
	struct clk		*utmi_clk_src;

	struct clk		*bus_aggr_clk;

	struct clk		*noc_aggr_clk;

	struct clk		*noc_aggr_north_clk;

	struct clk		*noc_aggr_south_clk;

	struct clk		*noc_sys_clk;

	struct clk		*cfg_ahb_clk;

	struct reset_control	*core_reset;

	struct regulator	*dwc3_gdsc;
@@ -3318,6 +3321,9 @@ static int dwc3_msm_suspend(struct dwc3_msm *mdwc, bool force_power_collapse, 
	clk_set_rate(mdwc->core_clk, 19200000);

	clk_disable_unprepare(mdwc->core_clk);

	clk_disable_unprepare(mdwc->noc_aggr_clk);

	clk_disable_unprepare(mdwc->noc_aggr_north_clk);

	clk_disable_unprepare(mdwc->noc_aggr_south_clk);

	clk_disable_unprepare(mdwc->noc_sys_clk);

	/*

	 * Disable iface_clk only after core_clk as core_clk has FSM

	 * depedency on iface_clk. Hence iface_clk should be turned off
@@ -3441,6 +3447,9 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc) 
	 */

	clk_prepare_enable(mdwc->iface_clk);

	clk_prepare_enable(mdwc->noc_aggr_clk);

	clk_prepare_enable(mdwc->noc_aggr_north_clk);

	clk_prepare_enable(mdwc->noc_aggr_south_clk);

	clk_prepare_enable(mdwc->noc_sys_clk);



	core_clk_rate = mdwc->core_clk_rate;

	if (mdwc->in_host_mode && mdwc->max_rh_port_speed == USB_SPEED_HIGH) {
@@ -3927,6 +3936,20 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc) 
	if (IS_ERR(mdwc->noc_aggr_clk))

		mdwc->noc_aggr_clk = NULL;



	mdwc->noc_aggr_north_clk = devm_clk_get(mdwc->dev,

						"noc_aggr_north_clk");

	if (IS_ERR(mdwc->noc_aggr_north_clk))

		mdwc->noc_aggr_north_clk = NULL;



	mdwc->noc_aggr_south_clk = devm_clk_get(mdwc->dev,

						"noc_aggr_south_clk");

	if (IS_ERR(mdwc->noc_aggr_south_clk))

		mdwc->noc_aggr_south_clk = NULL;



	mdwc->noc_sys_clk = devm_clk_get(mdwc->dev, "noc_sys_clk");

	if (IS_ERR(mdwc->noc_sys_clk))

		mdwc->noc_sys_clk = NULL;



	if (of_property_match_string(mdwc->dev->of_node,

				"clock-names", "cfg_ahb_clk") >= 0) {

		mdwc->cfg_ahb_clk = devm_clk_get(mdwc->dev, "cfg_ahb_clk");
@@ -5041,6 +5064,9 @@ static int dwc3_msm_remove(struct platform_device *pdev) 
	if (ret_pm < 0) {

		dev_err(mdwc->dev,

			"pm_runtime_get_sync failed with %d\n", ret_pm);

		clk_prepare_enable(mdwc->noc_aggr_north_clk);

		clk_prepare_enable(mdwc->noc_aggr_south_clk);

		clk_prepare_enable(mdwc->noc_sys_clk);

		clk_prepare_enable(mdwc->noc_aggr_clk);

		clk_prepare_enable(mdwc->utmi_clk);

		clk_prepare_enable(mdwc->core_clk);