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Commit 50f16a8b authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
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perf: Remove type specific target pointers



The only reason CQM had to use a hard-coded pmu type was so it could use
cqm_target in hw_perf_event.

Do away with the {tp,bp,cqm}_target pointers and provide a non type
specific one.

This allows us to do away with that silly pmu type as well.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Vince Weaver <vince@deater.net>
Cc: acme@kernel.org
Cc: acme@redhat.com
Cc: hpa@zytor.com
Cc: jolsa@redhat.com
Cc: kanaka.d.juvva@intel.com
Cc: matt.fleming@intel.com
Cc: tglx@linutronix.de
Cc: torvalds@linux-foundation.org
Cc: vikas.shivappa@linux.intel.com
Link: http://lkml.kernel.org/r/20150305211019.GU21418@twins.programming.kicks-ass.net


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 4e16ed99
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+1 −1
Original line number Diff line number Diff line
@@ -648,7 +648,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
		 * Per-cpu breakpoints are not supported by our stepping
		 * mechanism.
		 */
		if (!bp->hw.bp_target)
		if (!bp->hw.target)
			return -EINVAL;

		/*
+1 −1
Original line number Diff line number Diff line
@@ -527,7 +527,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
	 * Disallow per-task kernel breakpoints since these would
	 * complicate the stepping code.
	 */
	if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.bp_target)
	if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target)
		return -EINVAL;

	return 0;
+3 −4
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@ static bool __match_event(struct perf_event *a, struct perf_event *b)
	/*
	 * Events that target same task are placed into the same cache group.
	 */
	if (a->hw.cqm_target == b->hw.cqm_target)
	if (a->hw.target == b->hw.target)
		return true;

	/*
@@ -279,7 +279,7 @@ static bool __match_event(struct perf_event *a, struct perf_event *b)
static inline struct perf_cgroup *event_to_cgroup(struct perf_event *event)
{
	if (event->attach_state & PERF_ATTACH_TASK)
		return perf_cgroup_from_task(event->hw.cqm_target);
		return perf_cgroup_from_task(event->hw.target);

	return event->cgrp;
}
@@ -1365,8 +1365,7 @@ static int __init intel_cqm_init(void)

	__perf_cpu_notifier(intel_cqm_cpu_notifier);

	ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm",
				PERF_TYPE_INTEL_CQM);
	ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm", -1);
	if (ret)
		pr_err("Intel CQM perf registration failed: %d\n", ret);
	else
+1 −3
Original line number Diff line number Diff line
@@ -119,7 +119,6 @@ struct hw_perf_event {
			struct hrtimer	hrtimer;
		};
		struct { /* tracepoint */
			struct task_struct	*tp_target;
			/* for tp_event->class */
			struct list_head	tp_list;
		};
@@ -129,7 +128,6 @@ struct hw_perf_event {
			struct list_head	cqm_events_entry;
			struct list_head	cqm_groups_entry;
			struct list_head	cqm_group_entry;
			struct task_struct	*cqm_target;
		};
#ifdef CONFIG_HAVE_HW_BREAKPOINT
		struct { /* breakpoint */
@@ -138,12 +136,12 @@ struct hw_perf_event {
			 * problem hw_breakpoint has with context
			 * creation and event initalization.
			 */
			struct task_struct		*bp_target;
			struct arch_hw_breakpoint	info;
			struct list_head		bp_list;
		};
#endif
	};
	struct task_struct		*target;
	int				state;
	local64_t			prev_count;
	u64				sample_period;
+0 −1
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ enum perf_type_id {
	PERF_TYPE_HW_CACHE			= 3,
	PERF_TYPE_RAW				= 4,
	PERF_TYPE_BREAKPOINT			= 5,
	PERF_TYPE_INTEL_CQM			= 6,

	PERF_TYPE_MAX,				/* non-ABI */
};
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